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BU95303 датащи(PDF) 7 Page - Rohm |
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BU95303 датащи(HTML) 7 Page - Rohm |
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7 / 15 page ![]() Technical Note 7/14 BU95303 www.rohm.com 2010.10 - Rev.A © 2010 ROHM Co., Ltd. All rights reserved. ● Pin Descriptions Pin Name In/Out Active Descriptions D00P/N ~ D02P/N D10P/N ~ D12P/N D20P/N ~ D22P/N In Differential RSDS TM input terminals of display data The 3-bit differential input pairs generate the internal 6-bit data through the comparison between DXXP and DXXN. CLKP/N In Differential The RSDS TM clock input pair generate the internal shift clock through the comparison between CLKP and CLKN. Y1 ~ Y432 Out - Driver outputs for D/A converted 64 gray scale analog voltage. R/L In - The shift direction of internal shift register is controlled by this pin as shown below. R/L=H : Right shift SFTR→Y1→Y432→SFTL R/L=L : Left shift SFTL→Y432→Y1→SFTR SEL0 SEL1 In - The output channel number is controlled by this pin as shown below. SEL1 SEL0 Number of effective output terminal Invalid output terminal H H 384 Y193 ~ Y240 become Hi-Z H L 414 Y208 ~ Y225 become Hi-Z L H 420 Y211 ~ Y222 become Hi-Z L L 432(default) - This pin is pulled down to the DVSS inside the IC. LPC0 LPC1 In H Low power control pin LPC1 LPC0 power condition H H Strong power H L Normal power L H Ultra-low power L L Low power(default). This pin is pulled down to the DVSS inside the IC. SFTR In/Out H SFTR=H: Right shift start pulse input terminal in cascade connection. SFTR=L: Carry output terminal in cascade connection. SFTL In/Out H SFTL=H: Carry output terminal in cascade connection. SFTL=L: Left shift start pulse input terminal in cascade connection. STB In The data in the data register are transferred to the data latch at the rising edge of STB, then the gray scale voltages are output from the buffer at the falling edge of STB. INV In H Terminal to specify inverting or non-inverting of display data INV:H : Input data are inverted in the IC. INV:L : Input data are not inverted. V0 ~ V13 In - Input for the γ-correction reference voltage The following external reference voltages are input. POL In - At the rising edge of STB, the state of POL are transferred to the driver. POL=H : The reference voltage for odd number outputs are V0 to V6 and those for even number outputs are V7 to V13. POL=L : The reference voltage for odd number outputs are V7 to V13 and those for even number outputs are V0 to V6 IREP1,2 In - Repair amplifier input OREP1,2 Out - Repair amplifier output AVDD In - Power supply for driver block AVSS In - Ground for AVDD DVDD In - Power supply for digital block DVSS In - Ground for DVDD |
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