UC3842G

LINEAR INTEGRATED CIRCUIT

UNISONICTECHNOLOGIESCO.,LTD

6 of 8

www.unisonic.com.tw

QW-R103-036.B

OPEN-LOOP TEST CIRCUIT

6

5

7

8

3

4

2

1

Output

GND

COMP

FB

CS

CT

Rb

100k

or

3.3n

10p

Ra

100k

470μ

Vpwl

5K

adjust

High peak current associated with capacity loads necessitate careful grounding techniques. Timing and bypass

capacitors should be connected close to pin5 in single point GND.

UNDER-VOLTAGE LOCKOUT

During Under-Voltage Lockout, the output driver is biased to a high impedance state. Pin6 should be shunt to

GND with a bleeder resistor to prevent activing the power switch with output leakage currents.

ERROR AMPLIFIER CONFIGURATION

Error amplifier can source or sink up to 0.5mA