8

ã 2000 Semtech Corp.

www.semtech.com

SC1531(A)

POWER MANAGEMENT

Introduction

The SC1531(A) is intended for applications such as power

managed PCI and network interface cards (NICs), where

operation from a 3.3V VAUX supply may be required when

the 5V supply has been shut down. It provides a very

simple, low cost solution that uses very little pcb real

estate. During regular operation, 3.3V power for the PCI

card is provided by the SC1531(A)’s on-board low

dropout regulator, generated from the 5V supply. When

the 5V supply is removed and 3.3V VAUX is available, the

SC1531(A) connects this supply directly to its output

using a tiny SOT-23 external p-channel FET. Connection

of pin 3 (VAUX) to the 3.3V supply is optional, and adds

active pull-down to the Drive pin.

Component Selection

Output capacitors - Semtech recommends a minimum

bulk capacitance of 4.7µF at the output, along with a

0.1µF ceramic decoupling capacitor. Increasing the bulk

capacitance will improve the overall transient response.

The device is very tolerant of capacitor value and ESR

variations, in fact, any combination of capacitors with

C ³ 4.7µF and ESR < 1W is sufficient for stability. This

target is easily met using surface mount ceramic or

tantalum capacitors.

Input capacitors (5V) - Semtech recommends the use of

a 4.7µF ceramic or tantalum capacitor plus a 0.1µF

ceramic capacitor at the input. This allows for the device

being some distance from any bulk capacitance on the

rail. Additionally, input droop due to load transients is

reduced, improving load transient response.

Input capacitors (3.3V) - Semtech recommends

decoupling this pin (if used) with a 0.1µF ceramic

capacitor.

P-channel bypass FET - selection of the external FET is

determined by two main requirements:

1) the FET has to have a very low gate threshold

(typically ~1V) in order to be sufficiently turned on with

V

2) the FET R

(

)

)

MIN

(

)

ON

(

DS

)

MAX

(

O

VO

R

I

VAUX

≥

•

−

Load Transient Response

Trace 1: VO

Trace 2: I

Load Transient Response

Trace 1: VO

Trace 2: I

Applications Information

Notes:

(1) In Application Circuit on page 1.

(2) I