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Z8FS040 датащи(PDF) 15 Page - Zilog, Inc.

номер детали Z8FS040
подробное описание детали  ZMOTION Detection and Control Family Featuring Zilog?셲 PIR Technology
PDF  56 Pages
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производитель  ZILOG [Zilog, Inc.]
домашняя страница  http://www.zilog.com
Logo ZILOG - Zilog, Inc.

Z8FS040 датащи(HTML) 15 Page - Zilog, Inc.

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ZMOTION
TM Detection and Control Family
Product Specification
PS028506-1110
PRELIMINARY
10
RAM Memory Map (Register Files)
There is a total of 1 KB of RAM available on the base Z8F082A device. Some of this RAM (from 080h
to 0EFh and 190h to 3FFh) is used by Zilog’s PIR technology. The remainder of the RAM from 000h
to 07Fh and 110h to 18Fh (256 bytes) is available to the application. The MCU Control Registers are
located at the top of memory from F00h to FFFh and are also available to the application. The area
from 400h to EFFh contains no device memory.
The PIR Motion Detection API is a series of registers located in RAM memory space from 0F0h to
10Fh. It is through these memory locations that configuration and status are passed between the PIR
technology and the user application. Advanced API registers are located from address 0F0h to 0FFh.
See PIR Engine and API section for details on the API registers and setting up the project memory
environment.
Figure 6 - Z8FS040 RAM Memory Map
000h
Reserved for ePIR Engine
080h
FFFh
3FFh
18Fh
F00h
400h
EFFh
100h
0FFh
10Fh
110h
MCU
Control Registers
User Application RAM
(128 Bytes)
Standard ePIR API
Advanced ePIR API
07Fh
0EFh
0F0h
190h
Reserved for ePIR Engine
User Application RAM
(128 Bytes)



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