MP54C

© 1997 SEMTECH CORP.

PENTIUM

®

PROCESSOR

VOLTAGE REGULATOR MODULE

October 27, 1997

652 MITCHELL ROAD NEWBURY PARK CA 91320

INPUT AND OUTPUT CONNECTIONS

Pin No.

Row A

Row B

Pin No.

1

V

SS

V

SS

1

2

V

SS

V

SS

2

3

ND

V

I/O

3

4

V

I/O

V

I/O

4

5

+3.3V

+3.3V

5

6

+3.3V

+3.3V

6

7

V

CORE

V

CORE

7

8

V

CORE

V

CORE

8

9

V

SS

V

CORE

9

10

V

CORE

V

CORE

10

11

PWR GOOD

UPVRM#

11

12

SENSE

DISABLE

12

13

V

SS

V

SS

13

14

+5.0V

+5.0V

14

15

+5.0V

+5.0V

15

A

B

15

14

13

12

11

10

9

8

7

6

5

4

3

2

1

VRM

PCB

End view of VRM connector

(viewed from motherboard side)

Note: The functions of DISABLE, SENSE, PWR_GOOD & UPVRM# are optional features specified by Intel. These

are not included in the standard Voltage Regulator Module.

VOLTAGE REGULATOR MODULE CONNECTOR PIN REFERENCE

Pin Name

I/O

Function

Notes

+3.3V

Input

+3.3V Supply

Not connected

+5.0V

Input

+5.0V Supply

Input

V

CORE

Output

Voltage Regulator Module Output

Output

V

I/O

Output

CPU I/O power connection. Allows for split voltage plane for I/O

circuitry.

Tied to output

V

SS

Input

Ground Reference

Ground

DISABLE

Input

When driven high, this input will disable the Voltage Regulator Module

output and the output of the module will float.

Not connected

PWR

GOOD

Output

Power Good is driven low when the VRM output is not within valid

levels.

Not connected

SENSE

Input

Sense is provided for the regulator to correct for voltage drops across

the connector and motherboard powerplane.

Not connected

UPVRM#

Input

This signal indicates to future upgrade processors that the proper

module is installed. This signal must be tied HIGH for this module.

Tied to output.

ND

This pin may be used as a +12V supply input, otherwise it should be

left as a no connect (NC)

Not connected