Philips Semiconductors

Product data

PCA9556

2

2002 Mar 28

853-2138 27929

FEATURES

200 V MM per JESD22-A115 and 1000 V CDM per JESD22-C101

exceeds 100 mA

DESCRIPTION

The PCA9556 is a silicon CMOS circuit which provides parallel

input/output expansion for SMBus applications. The PCA9556

consists of an 8-bit input port register, 8-bit output port register, and

an SMBus interface. It has low current consumption and a high

impedance open drain output pin, I/O0.

The SMBus system master can reset the PCA9556 in the event of a

timeout by asserting a LOW on the reset input. The SMBus system

master can also invert the PCA9556 inputs by writing to the active

HIGH polarity inversion bits. Finally, the system master can enable

the PCA9556’s I/Os as either inputs or outputs by writing to the

configuration register.

The power-on reset puts the registers in their default state and

initializes the SMBus state machine. The RESET pin causes the

same reset/initialization to occur without depowering the part.

performance pin-for-pin replacement for the PCA9556.

PIN CONFIGURATION

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

su01045

SCL

SDA

A0

A1

A2

I/O0

I/O1

RESET

I/O7

I/O6

I/O5

I/O4

I/O3

I/O2

Figure 1. Pin configuration

PIN DESCRIPTION

PIN

NUMBER

SYMBOL

FUNCTION

1

SCL

Serial clock line

2

SDA

Serial data line

3

A0

Address input 0

4

A1

Address input 1

5

A2

Address input 2

6

I/O0

I/O0 (open drain)

7

I/O1

I/O1

8

Supply GROUND

9–14

I/O2–I/O7

I/O2 to I/O7

15

RESET

External reset (active LOW)

16

Supply voltage

ORDERING INFORMATION

PACKAGES

TEMPERATURE RANGE

ORDER CODE

DRAWING NUMBER

16-Pin Plastic TSSOP

–40 to +85

°C

PCA9556PW

SOT403-1

Standard packing quantities and other packaging data is available at www.philipslogic.com/packaging.