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PCF8523 датащи(PDF) 17 Page - NXP Semiconductors |
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PCF8523 датащи(HTML) 17 Page - NXP Semiconductors |
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17 / 66 page ![]() PCF8523 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved. Product data sheet Rev. 3 — 30 March 2011 17 of 66 NXP Semiconductors PCF8523 Real-Time Clock (RTC) and calendar 8.5.2.2 Direct switching mode If VDD > VBAT the internal power supply is VDD. If VDD < VBAT the internal power supply is VBAT. The direct switching mode is useful in systems where VDD is higher than VBAT at all times (e.g. VDD = 5 V, VBAT = 3.5 V). The direct switching mode is not recommended if the VDD and VBAT values are similar (e.g. VDD = 3.3 V, VBAT 3.0 V). In direct switching mode the power consumption is reduced compared to the standard mode because the monitoring of VDD and Vth(sw)bat is not performed. 8.5.2.3 Battery switch-over disabled, only one power supply (VDD) When the battery switch-over function is disabled: • The power supply is applied on the VDD pin. • The VBAT pin must be connected to ground. • The battery flag (BSF) is always logic 0. 8.5.3 Battery low detection function The PCF8523 has a battery low detection circuit, which monitors the status of the battery VBAT. Generation of interrupts from the battery low detection is controlled via bit BLIE (register Control_3). If BLIE is enabled the INT1 will follow the status of bit BLF (register Control_3). When VBAT drops below the threshold value Vth(bat)low (typically 2.5 V) the BLF flag (register Control_3) is set to indicate that the battery is low and that it must be replaced. Monitoring of the battery voltage also occurs during battery operation. Fig 10. Battery switch-over behavior in direct switching mode and with bit BSIE set logic 1 (enabled) 013aaa322 internal power supply (= VBBS) cleared via interface backup battery operation BSF Vth(sw)bat (= 2.5 V) VDD (= 0 V) VBAT VDD VBBS VBBS INT1 |
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