PIC24F04KA201 datasheet(13/26 Pages) MICROCHIP

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 2010 Microchip Technology Inc.

DS39991A-page 13

PIC24FXXKA2XX

3.7

Writing Configuration Registers

The procedure for writing the Configuration registers is

the same as for writing code memory. The only differ-

ence is that only one word is programmed in each

operation. When writing Configuration registers, one

word is programmed during each operation. Only work-

ing register, W0, is used as a temporary holding register

for the data to be programmed.

Table 3-6

provides

the

default

values

the

Configuration registers.

Table 3-6 provides the ICSP programming details for

programming the Configuration registers, including the

serial pattern with the ICSP command code, which

must be transmitted, LSB first, using the PGCx and

PGDx pins (see Figure 3-2). In Step 1 of Table 3-7, the

Reset vector is exited. In Step 2, the NVMCON register

is initialized for programming code memory. In Step 3,

the 24-bit starting destination address for programming

is loaded into the TBLPAG register and W7 register.

TABLE 3-6:

DEFAULT VALUES FOR

CONFIGURATION REGISTER

SERIAL INSTRUCTION

Note:

The TBLPAG register is hard-coded to

0xF8 (the upper byte address of all

locations of the Configuration registers).

Note:

The TBLPAG register must be loaded with

F8h.

Configuration

Registers

Value

FGS

03h

FOSCSEL

87h

FOSC

FFh

FWDT

DFh

FPOR

FBh

FICD(1)

C3h

FDS

FFh

Note 1:

The Configuration register, FICD, is a

reserved location and should be

programmed with the default value given

above.

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