| поискавой системы для электроныых деталей |
|
ADP2127 датащи(PDF) 13 Page - Analog Devices |
|
|
|||||||||||||||||||||||||||||
ADP2127 датащи(HTML) 13 Page - Analog Devices |
|
13 / 20 page ![]() ADP2126/ADP2127 Rev. A | Page 13 of 20 Undervoltage Lockout (UVLO) PROTECTION FEATURES If the input voltage is below the UVLO threshold, the ADP2126/ ADP2127 automatically turn off the power switches and place the parts in a low power consumption mode. This prevents potentially erratic operation at low input voltages. The UVLO levels have approximately 100 mV of hysteresis to ensure glitch-free startup. Overcurrent Protection To ensure that excessively high currents do not damage the MOSFET switches, the ADP2126/ADP2127 incorporate cycle-by- cycle overcurrent protection. This function is accomplished by monitoring the instantaneous peak current on the power PMOS switch. If this current exceeds the PMOS switch current limit (1 A typical), then the PMOS is immediately turned off. This minimizes the potential for damage to power components during certain faults and transient events. TIMING CONSTRAINTS Shutdown Time When the ADP2126/ADP2127 enter shutdown mode after the EXTCLK signal is removed, the ADP2126/ADP2127 must remain in shutdown mode for a minimum of 1400 μs, if no load is applied, before the EXTCLK signal can be reapplied. This allows all internal nodes to discharge to an off state. Output Short-Circuit Protection (SCP) If the output voltage is shorted to GND, a standard dc-to-dc controller delivers maximum power into that short. This may result in a potentially catastrophic failure. To prevent this, the ADP2126/ADP2127 sense when the output voltage is below the SCP threshold (typically 0.52 V). At this point, the controller turns off for approximately 450 μs and then automatically initiates a soft start sequence. This cycle repeats until the short is removed or the part is disabled. Figure 17 shows the operating behavior of the ADP2126/ADP2127 during a short-circuit fault. The SCP dramatically reduces the power delivered into the short circuit, yet still allows the converter to recover when the fault is removed. Power-Off Time When VIN drops, thereby triggering UVLO, the ADP2126/ ADP2127 have a minimum power-off time (t7) of 500 μs that must elapse before VIN can be reapplied. This allows all internal nodes to discharge enough power so that all internal devices are in an off state. t7 VIN × 10% Thermal Shutdown (TSD) Protection Figure 30. Power-Off Time The ADP2126/ADP2127 also include TSD protection when the part is in PWM mode only. If the die temperature exceeds 146°C (typical), the TSD protection activates and turns off both MOSFET power devices. They remain off until the die temperature falls to 133°C (typical), at which point the regulator restarts. |
|
|
ссылки URL |
| Вашему бизинису помогли Аллдатащит? [ DONATE ] |
Что такое Аллдатащит | реклама | контакт | Конфиденциальность | Ссылка на техническое описание | обмен ссыками | поиск по производителю All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |