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MPC5673K датащи(PDF) 106 Page - Freescale Semiconductor, Inc |
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MPC5673K датащи(HTML) 106 Page - Freescale Semiconductor, Inc |
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106 / 140 page ![]() MPC5675K Microcontroller Data Sheet, Rev. 4 Preliminary—Subject to Change Without Notice Electrical characteristics Freescale Semiconductor 106 Table 59. Reset sequence trigger—reset sequence Reset Sequence Trigger NOTES: 1 VREG Mode: I = Internal VREG Mode, E = External VREG Mode. Reset Sequence Start Condition Reset Sequence End Indication Reset Sequence Destructive Reset Sequence, BIST enabled2 2 Whether BIST is executed or not depends on device configuration data stored in the shadow sector of the NVM. Destructive Reset Sequence, BIST disabled2 External Reset Sequence Long, BIST enabled Functional Reset Sequence Long Functional Reset Sequence Short All active internal destructive reset sources (LVDs or internal HVD during power-up and during operation) I Section 3. 21.4.1, Internal VREG mode Release of RESET3 3 End of the internal reset sequence (as specified in Table 58) can only be observed by release of RESET if it is not held low externally beyond the end of the internal sequence which would prolong the internal reset PHASE3 until RESET is released externally. triggers cannot trigger cannot trigger cannot trigger E Section 3. 21.4.2, External VREG mode cannot trigger cannot trigger cannot trigger Assertion of RESET_SUP4 4 In external VREG mode only. Assertion of RESET5 5 The assertion of RESET can only trigger a reset sequence if the device was running (RESET released) before. RESET does not gate a Destructive Reset Sequence, BIST enabled or a Destructive Reset Sequence, BIST disabled. However, it can prolong these sequences if RESET is held low externally beyond the end of the internal sequence (beyond PHASE3). I/E Section 3. 21.4.3, External Reset via RESET cannot trigger triggers6 6 If RESET is configured for long reset (default) and if BIST is enabled via device configuration data stored in the shadow sector of the NVM. triggers7 triggers8 All internal functional reset sources configured for long reset I/E Sequence starts with internal reset trigger Release of RESET9 cannot trigger cannot trigger triggers cannot trigger All internal functional reset sources configured for short reset I/E cannot trigger cannot trigger cannot trigger triggers |
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