MPC5673K datasheet(100/140 Pages) FREESCALE

100 / 140 page

MPC5675K Microcontroller Data Sheet, Rev. 4

Preliminary—Subject to Change Without Notice

Electrical characteristics

Freescale Semiconductor

100

3.19.3

DRAM pads electrical specification (VDD_HV_DRAM = 1.8 V)

Table 53. DRAM pads AC electrical specifications (VDD_HV_DRAM = 2.5 V)

No.

Pad Name

Prop. Delay (ns)

 H/H  L1

NOTES:

 H signifies low-to-high propagation delay and H  L signifies high-to-low propagation delay.

Rise/Fall Edge (ns)

Drive

Load

(pF)

Drive/Slew

Rate Select

Min

Max

Min

Max

MSB, LSB

DRAM ACC

1.4/1.5

2.5/2.4

2.1/2.1

4.3/4.1

011

1.7/1.7

2.8/2.7

0.6/0.7

1.1/1.3

DRAM DQ

1.4/1.5

2.5/2.4

2.1/2.1

4.3/4.1

011

1.7/1.7

2.8/2.7

0.6/0.7

1.1/1.3

DRAM CLK

1.4/1.4

2.4/2.4

2.1/2.1

4.4/4.1

011

1.6/1.6

2.7/2.7

0.6/0.7

1.6/1.8

Table 54. DRAM pads DC electrical specifications (VDD_HV_DRAM = 1.8 V)

No.

Symbol

Parameter

Condition

Min

Max

Unit

1VDD_HV_DRAM

SR I/O supply voltage

—1.7

1.9

2VDD_HV_DRAM_VREF CC Input reference voltage

—

0.49 × VDD_HV_DRAM 0.51 × VDD_HV_DRAM

3VDD_HV_DRAM_VTT CC Termination voltage

NOTES:

1 BGA473: Termination voltage can be supplied via package pins. BGA257 Termination voltage internally tied as the

BGA257 does not provide DRAM interface. Disable ODT

—VDD_HV_DRAM_VREF

–0.04

VDD_HV_DRAM_VREF

+0.04

4VIH

CC Input high voltage

—VDD_HV_DRAM_VREF

+ 0.125

—

5VIL

CC Input low voltage

——

VDD_HV_DRAM_VREF

–0.125

6VOH

CC Output high voltage

ODT

enabled2

2 Termination voltage is supplied by VDD_HV_DRAM_VTT.

VDD_HV_DRAM_VTT

+0.81

—

ODT

disabled3

3 Tie V

DD_HV_DRAM_VTT to VSS and disable ODT

0.8 × VDD_HV_DRAM

—

7VOL

CC Output low voltage

ODT

enabled2

—VDD_HV_DRAM_VTT

–0.81

ODT

disabled3

—0.2 × VDD_HV_DRAM

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