MPC5644B datasheet(51/114 Pages) FREESCALE

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MPC5646C Microcontroller Data Sheet, Rev. 3

Preliminary—Subject to Change Without Notice

Freescale Semiconductor

4.6.5

I/O pad current specification

The I/O pads are distributed across the I/O supply segment. Each I/O supply is associated to a VDD/VSS_HV supply pair as

described in Table 19.

Table 20 provides I/O consumption figures.

In order to ensure device reliability, the average current of the I/O on a single segment should remain below the IAVGSEG

maximum value.

In order to ensure device functionality, the sum of the dynamic and static current of the I/O on a single segment should remain

below the IDYNSEG maximum value.

Ttr CC

Output transition time

output pin(4)

FAST configuration

CL = 25 pF

VDD = 5.0 V ± 10%,

PAD3V5V = 0

——

CL = 50 pF

—

CL = 100 pF

—

CL = 25 pF

VDD = 3.3 V ± 10%,

PAD3V5V = 1

——

CL = 50 pF

—

CL = 100 pF

—

1 V

DD = 3.3 V ± 10% / 5.0 V ± 10%, TA = 40 to 125 °C, unless otherwise specified.

2 V

DD as mentioned in the table is VDD_HV_A/VDD_HV_B.

3 All values need to be confirmed during device validation.

4 C

L includes device and package capacitances (CPKG < 5 pF).

Table 19. I/O supplies

Package

I/O Supplies

256 MAPBGA

Equivalent to 208-pin LQFP segment pad distribution + G6, G11, H11, J11

208 LQFP

pin6

(VDD_HV_A)

pin7

(VSS_HV)

pin27

(VDD_HV_A)

pin28

(VSS_HV)

pin73

(VSS_HV)

pin75

(VDD_HV_A)

pin101

(VDD_HV_A)

pin102

(VSS_HV)

pin132

(VSS_HV)

pin133

(VDD_HV_A)

pin147

(VSS_HV)

pin148

(VDD_HV_B)

pin174

(VSS_HV)

pin175

(VDD_HV_A)

—

176 LQFP

pin6

(VDD_HV_A)

pin7

(VSS_HV)

pin27

(VDD_HV_A)

pin28

(VSS_HV)

pin57

(VSS_HV)

pin59

(VDD_HV_A)

pin85

(VDD_HV_A)

pin86

(VSS_HV)

pin123

(VSS_HV)

pin124

(VDD_HV_B)

pin150

(VSS_HV)

pin151

(VDD_HV_A)

——

Table 18. Output pin transition times (continued)

Symbol

Parameter

Conditions1,2

Value3

Unit

Min

Typ

Max

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