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HCS200 датащи(PDF) 8 Page - Microchip Technology |
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HCS200 датащи(HTML) 8 Page - Microchip Technology |
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8 / 34 page ![]() HCS200 DS40138D-page 8 © 2011 Microchip Technology Inc. FIGURE 4-1: CODE WORD FORMAT FIGURE 4-2: CODE WORD ORGANIZATION FIGURE 4-3: SYNCHRONOUS TRANSMISSION MODE FIGURE 4-4: CODE WORD ORGANIZATION (SYNCHRONOUS TRANSMISSION MODE) LOGIC ‘0’ LOGIC ‘1’ Bit Period Preamble Header Encrypted Portion of Transmission Fixed Portion of Transmission Guard Time TP TH THOP TFIX TG TE TE TE 50% Duty Cycle Fixed (1-bit) VLOW (1-bit) Button Status S2 S1 S0 S3 Serial Number (28 bits) Button Status S2 S1 S0 S3 Discrimination bits (12 bits) Sync Counter (16 bits) Fixed (1-bit) VLOW (1-bit) Button Status 1 1 1 1 Serial Number (28 bits) SEED (32 bits) 34 bits of Fixed Portion 32 bits of Encrypted Portion 66 Data bits Transmitted LSb first. LSb MSb MSb LSb SEED replaces Encrypted Portion when all button inputs are activated at the same time. “01,10,11” PWM S2 S[1:0] TPS TPH1 TPH2 t = 50 ms Preamble Header Data Reserved (16 bits) Padding (2 bits) Button Status S2 S1 S0 S3 Serial Number (28 bits) Button Status S2 S1 S0 S3 Discrimina- tion bits (12 bits) Sync Counter (16 bits) 82 Data bits Transmitted LSb first. LSb MSb Fixed Portion Encrypted Portion |
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