MCP3901 datasheet(48/62 Pages) MICROCHIP

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MCP3901

DS22192D-page 48

7.6

Configuration Registers

The Configuration registers contain settings for the

internal clock prescaler, the oversampling ratio, the

Channel 0 and Channel 1 width settings of 16 or

24 bits, the modulator output control settings, the state

of the channel Resets and shutdowns, the dithering

algorithm control (for Idle tones suppression), and the

control bits for the external VREF and external CLK.

CONFIGURATION REGISTERS:

CONFIG1: ADDRESS 0x0A, CONFIG2: ADDRESS 0x0B

R/W-0

R/W-1

R/W-0

PRESCALE

<1>

PRESCALE

<0>

OSR<1>

OSR<0>

WIDTH

_CH1

WIDTH

_CH0

MODOUT

_CH1

MODOUT

_CH0

bit 15

bit 8

R/W-0

R/W-1

R/W-0

RESET

_CH1

RESET

_CH0

SHUTDOWN

_CH1

SHUTDOWN

_CH0

DITHER

_CH1

DITHER

_CH0

VREFEXT

CLKEXT

bit 7

bit 0

Legend:

R = Readable bit

W = Writable bit

U = Unimplemented bit, read as ‘0’

-n = Value at POR

‘1’ = Bit is set

‘0’ = Bit is cleared

x = Bit is unknown

bit 15-14

PRESCALE<1:0>: Internal Master Clock (AMCLK) Prescaler Value bits

= AMCLK = MCLK/8

= AMCLK = MCLK/4

= AMCLK = MCLK/2

= AMCLK = MCLK (default)

bit 13-12

OSR<1:0>: Oversampling Ratio for Delta-Sigma A/D Conversion bits (all channels, DMCLK/DRCLK)

= 256

= 128

= 64 (default)

= 32

bit 11-10

WIDTH_CH<1:0>: ADC Channel Output Data Word Width bits

= 24-bit mode

= 16-bit mode (default)

bit 9-8

MODOUT_CH<1:0>: Modulator Output Setting for MDAT Pins bits

= Both CH0 and CH1 modulator outputs present on MDAT1 and MDAT0 pins

= CH1 ADC modulator output present on MDAT1 pin

= CH0 ADC modulator output present on MDAT0 pin

= No modulator output is enabled (default)

bit 7-6

RESET_CH<1:0>: Reset Mode Setting for ADCs bits

= Both CH0 and CH1 ADC are in Reset mode

= CH1 ADC in Reset mode

= CH0 ADC in Reset mode

= Neither Channel in Reset mode (default)

bit 5-4

SHUTDOWN_CH<1:0>: Shutdown Mode Setting for ADCs bits

= Both CH0 and CH1 ADC are in Shutdown

= CH1ADC is in shutdown

= CH0 ADC is in shutdown

= Neither Channel is in shutdown (default)

bit 3-2

DITHER_CH<1:0>: Control for Dithering Circuit bits

= Both CH0 and CH1 ADC have dithering circuit applied (default)

= Only CH1 ADC has dithering circuit applied

= Only CH0 ADC has dithering circuit applied

= Neither Channel has dithering circuit applied

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