LTC4365

12

4365f

reverse supply protection. The waveforms of Figure 7 were

captured using a 40V dual N-channel MOSFET, a 10μF

Recovery Timer

The LTC4365 has a recovery delay timer that filters noise

or UV fault has occurred, the input supply must return to

the desired operating voltage window for at least 36ms in

order to turn the external MOSFET back on as illustrated

in Figures 4 and 5.

Going out of and then back into fault in less than 36ms

will keep the MOSFET off continuously. Similarly, coming

out of shutdown (SHDN low to high) triggers an 800μs

start-up delay timer (see Figure 10).

The recovery timer is also active while the LTC4365 is

power good window. See Figure 8.

Gentle Shutdown

The SHDN input turns off the external MOSFETs in a

gentle, controlled manner. When SHDN is asserted low,

a 90μA current sink slowly begins to turn off the external

MOSFETs.

Once the voltage at the GATE pin falls below the voltage

feedback loop takes over. This loop forces the GATE voltage

is pulled to within 400mV of ground.

Gentle gate turn off reduces load current slew rates and

mitigates voltage spikes due to parasitic inductances.

To further decrease GATE pin slew rate, place a capaci-

tor across the gate and source terminals of the external

MOSFETs. The waveforms of Figure 9 were captured using

the Si4230 dual N-channel MOSFETs, and a 2A load with

100μF output capacitor.

APPLICATIONS INFORMATION

4365 F08

GATE

MOSFET OFF

MOSFET ON

Figure 8. Recovery Timing During Power-On

GATE

SHDN

4365 F10

FAULT

Figure 10. Gentle Shutdown Timing

FAULT Status

The FAULT high voltage open drain output is driven low if

Figures 4, 5 and 10 show the FAULT output timing.

5V/DIV

4365 F9

100μs/DIV

GATE

SHDN

T = 25°C

GND