DS3170_11 datasheet(2/230 Pages) MAXIM

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DS3170 DS3/E3 Single-Chip Transceiver

2 of 230

TABLE OF CONTENTS

DETAILED DESCRIPTION

BLOCK DIAGRAMS

APPLICATIONS

FEATURE DETAILS

4.1

GLOBAL FEATURES .................................................................................................................................. 13

4.2

RECEIVE DS3/E3 LIU FEATURES .............................................................................................................. 13

4.3

JITTER ATTENUATOR FEATURES ................................................................................................................ 13

4.4

RECEIVE DS3/E3 FRAMER FEATURES ....................................................................................................... 13

4.5

TRANSMIT DS3/E3 FORMATTER FEATURES ................................................................................................ 14

4.6

TRANSMIT DS3/E3 LIU FEATURES ............................................................................................................ 14

4.7

CLOCK RATE ADAPTER FEATURES............................................................................................................. 14

4.8

HDLC CONTROLLER FEATURES ................................................................................................................ 14

4.9

FEAC CONTROLLER FEATURES ................................................................................................................ 14

4.10 TRAIL TRACE BUFFER FEATURES .............................................................................................................. 15

4.11 BIT ERROR-RATE TESTER (BERT) FEATURES ............................................................................................ 15

4.12 LOOPBACK FEATURES .............................................................................................................................. 15

4.13 MICROPROCESSOR INTERFACE FEATURES ................................................................................................. 15

4.14 SLAVE SERIAL PERIPHERAL INTERFACE (SPI) FEATURES ............................................................................. 15

4.15 TEST FEATURES ...................................................................................................................................... 15

STANDARDS COMPLIANCE

ACRONYMS AND GLOSSARY

MAJOR OPERATIONAL MODES

7.1

DS3/E3 FRAMED LIU MODE ..................................................................................................................... 18

7.2

DS3/E3 UNFRAMED LIU MODE ................................................................................................................. 20

7.3

DS3/E3 FRAMED POS/NEG MODE........................................................................................................... 21

7.4

DS3/E3 UNFRAMED POS/NEG MODE ...................................................................................................... 22

7.5

DS3/E3 FRAMED UNI MODE .................................................................................................................... 23

7.6

DS3/E3 UNFRAMED UNI MODE ................................................................................................................ 24

PIN DESCRIPTIONS

8.1

SHORT PIN DESCRIPTIONS........................................................................................................................ 25

8.2

DETAILED PIN DESCRIPTIONS.................................................................................................................... 27

8.3

PIN FUNCTIONAL TIMING ........................................................................................................................... 37

8.3.1

Line IO............................................................................................................................................ 37

8.3.2

DS3/E3 Framing Overhead Functional Timing................................................................................. 40

8.3.3

DS3/E3 Serial Data Interface .......................................................................................................... 41

8.3.4

Microprocessor Interface Functional Timing .................................................................................... 43

8.3.5

JTAG Functional Timing.................................................................................................................. 50

INITIALIZATION AND CONFIGURATION

9.1

MONITORING AND DEBUGGING .................................................................................................................. 52

FUNCTIONAL DESCRIPTION

10.1 PROCESSOR BUS INTERFACE .................................................................................................................... 53

10.1.1 SPI Serial Port Mode....................................................................................................................... 53

10.1.2 8/16 Bit Bus Widths......................................................................................................................... 53

10.1.3 Ready Signal (

RDY) ........................................................................................................................53

10.1.4 Byte Swap Modes ........................................................................................................................... 53

10.1.5 Read-Write/Data Strobe Modes....................................................................................................... 53

10.1.6 Clear on Read/Clear on Write Modes .............................................................................................. 53

10.1.7 Interrupt and Pin Modes.................................................................................................................. 54

10.1.8 Interrupt Structure........................................................................................................................... 54

10.2 CLOCKS .................................................................................................................................................. 55

10.2.1 Line Clock Modes ........................................................................................................................... 55

10.2.2 Sources of Clock Output Pin Signals ............................................................................................... 57

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