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R5F363AMNFB датащи(PDF) 23 Page - Renesas Technology Corp

номер детали R5F363AMNFB
подробное описание детали  This MCU consumes low power, and supports operating modes
PDF  119 Pages
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производитель  RENESAS [Renesas Technology Corp]
домашняя страница  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

R5F363AMNFB датащи(HTML) 23 Page - Renesas Technology Corp

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R01DS0033EJ0200 Rev.2.00
Page 23 of 115
Feb 07, 2011
M16C/63 Group
2. Central Processing Unit (CPU)
2.
Central Processing Unit (CPU)
Figure 2.1 shows the CPU registers. Seven registers (R0, R1, R2, R3, A0, A1, and FB) out of 13 compose a
register bank, and there are two register banks.
Figure 2.1
CPU Registers
R0H (upper bits of R0)
b15
b8 b7
b0
R3
INTBH
USP
ISP
SB
Note:
1. These registers compose a register bank. There are two register banks.
C
D
Z
S
B
O
I
U
IPL
R2
b31
R3
R2
A1
A0
FB
b19
INTBL
b15
b0
PC
INTBH is the 4 upper bits of the INTB register and INTBL
is the 16 lower bits.
b19
b0
b15
b0
FLG
b15
b0
b15
b0
b7
b8
Data registers (1)
Address registers (1)
Frame base registers (1)
Program counter
Interrupt table register
User stack pointer
Interrupt stack pointer
Static base register
Flag register
Reserved area
Carry flag
Debug flag
Zero flag
Sign flag
Register bank select flag
Overflow flag
Interrupt enable flag
Stack pointer select flag
Reserved area
Processor interrupt priority level
R1H (upper bits of R1)
R0L (lower bits of R0)
R1L (lower bits of R1)



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