MAX9268 datasheet(13/35 Pages) MAXIM

13 / 35 page

Gigabit Multimedia Serial Link Deserializer

with LVDS System Interface

______________________________________________________________________________________ 13

Detailed Description

The MAX9268 deserializer with LVDS system inter-

face utilizes Maxim’s GMSL technology. The MAX9268

deserializer pairs with any GMSL serializer to form a

complete digital serial link for joint transmission of high-

speed video, audio, and bidirectional control data.

The MAX9268 allows a maximum serial payload data

rate of 2.5Gbps for greater than 15m of STP cable. The

deserializer operates up to 104MHz for 3-channel LVDS

or 78MHz for 4-channel LVDS. The operating frequency

range supports display panels from QVGA (320 x 240)

up to WXGA (1280 x 800) and higher with 24-bit color.

The 3-channel mode outputs an LVDS clock, three

lanes of LVDS data (21 bits), UART control signals,

and one I2S audio channel (consisting of three sig-

nals). The 4-channel mode outputs an LVDS clock, four

lanes of LVDS data (28 bits), UART control signals,

one I2S audio channel, and control signals. The I2S

interface supports sample rates from 8kHz to 192kHz

and audio word lengths of 4 to 32 bits. The embed-

ded control channel forms a full-duplex, differential,

100kbps to 1Mbps UART link between the serializer and

deserializer. An ECU or FC can be located on the

serializer side of the link (typical for video display), on the

MAX9268 side of the link (typical for image sensing), or

on both sides. In addition, the control channel enables

ECU/FC control of peripherals in the remote side, such

as backlight control, grayscale Gamma correction,

camera module, and touch screen. Base-mode com-

munication with peripherals uses either I2C or the GMSL

UART format. A bypass mode enables full-duplex com-

munication using custom UART formats.

The MAX9268 channel equalizer, along with the

serializer preemphasis, extends the link length and

enhances the link reliability. Spread spectrum is avail-

able to reduce EMI on the LVDS and control outputs of

the MAX9268. The serial input complies with ISO 10605

and IEC 61000-4-2 ESD protection standards.

The FC configures various operating conditions of the

GMSL serializer and the MAX9268 through internal

registers. The default device addresses are stored in reg-

isters 0x00 and 0x01 of both the GMSL serializer and the

MAX9268 (Table 1). Write to the 0x00 and 0x01 registers

in both devices to change the device address of the GMSL

serializer or the MAX9268.

Table 1. Power-Up Default Register Map (see Table 12)

ADDRESS

(hex)

POWER-UP

DEFAULT

(hex)

POWER-UP DEFAULT SETTINGS

(MSB FIRST)

0x00

0x40, 0x44, 0x48

0x80, 0x84, 0x88,

0xC0, 0xC4, 0xC8

SERID = XX00XX0, serializer device address is determined by ADD1 and ADD0

(Table 2)

RESERVED = 0

0x01

0x50, 0x54, 0x58,

0x90, 0x94, 0x98,

0xD0, 0xD4, 0xD8

DESID =XX01XX0, deserializer device address is determined by ADD1 and ADD0

(Table 2)

RESERVED = 0

0x02

0x1F or 0x5F

SS = 00 (SSEN = low), SS = 01 (SSEN = high), spread-spectrum settings depend on

SSEN pin state at power-up

RESERVED = 0

AUDIOEN = 1, I2S channel enabled

PRNG = 11, automatically detect the pixel clock range

SRNG = 11, automatically detect serial-data rate

0x03

0x00

AUTOFM = 00, calibrate spread-modulation rate only once after locking

RESERVED = 0

SDIV = 00000, autocalibrate sawtooth divider

MAX9268 датащи(PDF) 13 Page - Maxim Integrated Products

MAX9268 датащи(HTML) 13 Page - Maxim Integrated Products

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35

датащи скачать

ссылки URL