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FMP3216DAX датащи(PDF) 5 Page - FIDELIX

номер детали FMP3216DAX
подробное описание детали  2M x 16 bit Super Low Power and Low Voltage Full CMOS RAM
PDF  11 Pages
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производитель  FIDELIX [FIDELIX]
домашняя страница  http://www.fidelix.co.kr
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FMP3216DAX датащи(HTML) 5 Page - FIDELIX

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FMP3216DAx
CMOS LPRAM
AC CHARACTERISTICS(VCC=2.7V~3.3V)
AC CHARACTERISTICS(VCC 2.7V 3.3V)
Parameter List
Symbol
Speed Bins
Units
60ns
70ns
Min
Max
Min
Max
Read Cycle Time
tRC
60
20k
70
20k
ns
Address Access Time
tAA
-
60
-
70
ns
Chip Select to Output
tCO
-
60
-
70
ns
Read
Output Enable to Valid Output
tOE
-
25
-
25
ns
/UB, /LB Access Time
tBA
-
25
-
25
ns
Chip Select to Low-Z Output
tLZ
10
-
10
-
ns
/UB, /LB Enable to Low-Z Output
tBLZ
10
-
10
-
ns
Output Enable to Low-Z Output
tOLZ
5
-
5
-
ns
Chip Disable to High- Z Output
tHZ
0505
ns
/UB, /LB Disable to High- Z Output
tBHZ
0505
ns
g
p
Output Disable to High- Z Output
tOHZ
0505
ns
Output Hold from Address Change
tOH
5
-
5
-
ns
Write Cycle Time
tWC
60
20k
70
20k
ns
Chip Select to End of Write
tCW
50
-
60
-
ns
Address Set-up Time
tAS
0
-
0
-
ns
Address Valid to End of Write
tAW
50
-
60
-
ns
/UB /LB V lid t E d f W it
tBW
50
60
Write
/UB, /LB Valid to End of Write
tBW
50
-
60
-ns
Write Pulse Width
tWP
50
-
50
-
ns
Write Recovery Time
tWR
0
-
0
-
ns
Write to Output High-Z
tWHZ
0505
ns
Data to Write Time Overlap
tDW
15
-
15
-
ns
Data Hold from Write Time
tDH
0
-
0
-
ns
End Write to Output Low-Z
tOW
5
-
5
-
ns
Page
Page Mode Cycle Time
tPC
20
-
25
-
ns
Page Mode Address Access Time
tPAA
-
20
-
25
ns
Maximum Cycle Time
tMRC
-
20k
-
20k
ns
/CS High Pulse Width
tCP
10
-
10
-
ns
1. /CS High Pulse Width is defined by /CS.
Revision 0.1
Jul. 2010
5



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