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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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L6460 датащи(PDF) 121 Page - STMicroelectronics |
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L6460 датащи(HTML) 121 Page - STMicroelectronics |
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121 / 139 page  L6460 GPIO pins Doc ID 17713 Rev 1 121/139 22.12 GPIO[11] The GPIO[11] truth table is (for the abbreviation list please refer to Table 40). Table 52. GPIO[11] truth table EnOpl (1) 1. The EnOp1 bit in the OpAmp1Ctrl register enables the operational amplifier 1. GPIO[11] SPI bits Function Note GpioOut enable[11] Mode[2] Mode[1] Mode[0] 1 X X X X OpAmp1 Out (2) 2. When EnOp1 = ‘1’ the GpioOutEnable[11] bit is forced to 0. 0 0 X X X HiZ (SPI_IN) 01 0 0 0 SPI OUT (3) 3. In all configurations in which GPIO[11] is enabled as output: a) the GPIO[11] pin can be always used as an analog input to the ADC system (ADC function) by writing its address in the A2DChannelX[4:0] in the A2DConfigX register and starting a conversion; b) the GPIO[11] pin can be always used as a digital input so its value can be always read through SPI interface (SPI_IN function); c) please note that GPIO[11] output is directly connected to ExtPWM4 input for bridge 3 or 4 and therefore particular care must be taken in order to avoid wrong PWM signals when ExtPWM4 is selected for bridge 3 or 4; d) the GPIO[11] pin is a rail to rail output supplied by VGPIO_SPI. 01 0 0 1 A2DGpo (3) 01 0 1 0 AuxPwm1 (3) 01 0 1 1 AuxPwm2 (3) 01 1 0 0 SPI OUT inverted (3) 0 1 1 0 1 A2DGpo inverted (3) 01 1 1 0 AuxPwm1 inverted (3) 01 1 1 1 AuxPwm2 inverted (3) |
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