AP7215 datasheet(8/11 Pages) DIODES

8 / 11 page

AP7215

600mA CMOS LDO

AP7215 Rev. 1

8 of 11

FEBRUARY 2009

www.diodes.com

Application Note

Input Capacitor

A 1

μF ceramic capacitor is recommended to connect between V

and GND pins to decouple input power supply glitch and noise.

The amount of the capacitance may be increased without limit.

A lower ESR (Equivalent Series Resistance) capacitor allows the

use of less capacitance, while higher ESR type requires more

capacitance. This input capacitor must be located as close as

possible to the device to assure input stability and less noise. For

PCB layout, a wide copper trace is required for both VIN and

GND.

Suggested Input Capacitance

Vendor

Capacitance

Type

Series

TAIYO YUDEN

μF

Ceramic LMK212B

Output Capacitor

The output capacitor is required to stabilize and help the transient

response of the LDO. The AP7215 is designed to have excellent

transient response for most applications with a small amount of

output capacitance. The AP7215 is stable with any small ceramic

output capacitors of 1.0

μF or higher value, and the temperature

coefficients of X7R or X5R type.

Additional capacitance helps to

reduce

undershoot

and

overshoot

during

transient.

For

PCB layout, the output capacitor must be placed as close as

possible to VROUT and GND pins, and keep the leads as short as

possible.

Suggested Output Capacitance

Vendor

Capacitance

Type

Series

TAIYO YUDEN

μF

Ceramic LMK212B

Suggested Resistance

Vendor

Capacitance

Type

YAGEO

SMD

FR-SK

ENABLE/SHUTDOWN Operation

The AP7215 is turned on by setting the EN pin high, and is turned

off by pulling it low. If this feature is not used, the EN pin should

be tied to VIN pin to keep the regulator output on at all time. To

ensure proper operation, the signal source used to drive the

EN pin must be able to swing above and below the specified

turn-on/off

voltage

thresholds

listed

the

Electrical

Characteristics section under VEH and VEL.

Current Limit Protection

When output current at VROUT pin is higher than current limit

threshold, the current limit protection will be triggered and clamp

the

output

current

approximately

750mA

prevent

over-current and protect the regulator from damage due to

overheating.

Short circuit protection

When VROUT pin is shorted to GND or VROUT voltage is less than

200mV, short circuit protection will be triggered and clamp the

output current to approximately 50mA.

VDOUT (reset output)

---Open-Drain Active-Low reset output---

In general, VDOUT is pulled up by a resistor (100KΩ) to VIN.

The

AP7215 microprocessor (

μP) supervisory circuitry asserts a

guaranteed logic-low reset during power-up and power-down.

Reset is asserted when VIN is below the reset threshold and

remain asserted for at least tRP after VIN rises above the reset

threshold.

As long as VIN is lower than the reset threshold, VDOUT remains at

logic "0". When VIN becomes higher than VHYS, a logic "1" is

asserted after a 20ms time delay defined by tRP

VROUT

VDOUT

EN=0

EN=1

3.3V

AP7215 датащи(PDF) 8 Page - Diodes Incorporated

AP7215 датащи(HTML) 8 Page - Diodes Incorporated

Html Pages

1 2 3 4 5 6 7 8 9 10 11

датащи скачать

ссылки URL