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TLE4675D датащи(PDF) 17 Page - Infineon Technologies AG

номер детали TLE4675D
подробное описание детали  Low Drop Out Linear Voltage Regulator 5V Fixed Output Voltage
PDF  25 Pages
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производитель  INFINEON [Infineon Technologies AG]
домашняя страница  http://www.infineon.com
Logo INFINEON - Infineon Technologies AG

TLE4675D датащи(HTML) 17 Page - Infineon Technologies AG

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Data Sheet
17
Rev. 1.0, 2008-09-30
TLE4675
Reset Function
Reset Reaction Time
In case the output voltage of the regulator drops below the output undervoltage lower reset threshold
V
RT,lo, the
delay capacitor CD is discharged rapidly. Once the delay capacitor’s voltage has reached the lower delay
switching threshold
V
DST,lo, the reset output RO will be set to “low”.
Additionally to the delay capacitor discharge time
t
rr,d an internal time trr,int applies. Hence the total reset reaction
time
t
rr,total becomes:
with
•
t
rr,total: total reset reaction time
•
t
rr,int: Internal reset reaction time; see Item 7.2.16
•
t
rr,d: Delay capacitor discharge time. For a capacitor CD different from the value specified in Item 7.2.17, see
typical performance graphs.
Reset Output Pull-Up Resistor
R
RO:
The Reset Output RO is an open collector output requiring an external pull-up resistor to a voltage
V
IO, e.g. VQ. In
Item 7.2.7 a minimum value for the external resistor
R
RO is given for the case it is connected to VQ.
For applications, where the external pull-up resistor
R
RO has to be connected to a different voltage rail VIO than
V
Q, the minimum pull-up resistor RRO can be calculated out of the minimum sink current capability given in
Item 7.2.6:
:
with
•
R
RO: Reset pull up resistor
•
V
IO: Voltage rail, where the pull up resistor is connected
•
V
RO,low: Maximum allowed voltage level for a logic “Low” signal inside the application
Please be aware, that
V
IO should not exceed the ratings for the RO pin given in Item 4.1.3.
Reset Output “RO” Low for
V
Q ≥ 1V
In case of an undervoltage reset condition reset output “RO” is held “low” for
V
Q ≥ 1 V, even if the input voltage VI
is 0 V. This is achieved by supplying the reset circuit from the output capacitor.
trr,total
trr,int trr,d
+
=
RRO
VIO VRO,low
–
IRO max
,
----------------------------------
=



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