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MPC8535E датащи(PDF) 58 Page - Freescale Semiconductor, Inc

номер детали MPC8535E
подробное описание детали  Integrated Processor Hardware Specifications
PDF  126 Pages
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производитель  FREESCALE [Freescale Semiconductor, Inc]
домашняя страница  http://www.freescale.com
Logo FREESCALE - Freescale Semiconductor, Inc

MPC8535E датащи(HTML) 58 Page - Freescale Semiconductor, Inc

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MPC8535E PowerQUICC III Integrated Processor Hardware Specifications, Rev. 3
Ethernet: Enhanced Three-Speed Ethernet (eTSEC), MII Management
Freescale Semiconductor
58
2.9.3.4.2
SGMII Receive AC Timing Specifications
Table 42 provides the SGMII receive AC timing specifications. Source synchronous clocking is not supported. Clock is
recovered from the data. Figure 31 shows the SGMII Receiver Input Compliance Mask eye diagram.
Figure 31. SGMII Receiver Input Compliance Mask
Table 42. SGMII Receive AC Timing Specifications
At recommended operating conditions with X2VDD = 1.0V ± 5%.
Parameter
Symbol
Min
Typ
Max
Unit
Notes
Deterministic Jitter Tolerance
JD
0.37
UI p-p
1
Combined Deterministic and Random Jitter Tolerance
JDR
0.55
UI p-p
1
Sinusoidal Jitter Tolerance
JSIN
0.1
UI p-p
1
Total Jitter Tolerance
JT
0.65
UI p-p
1
Bit Error Ratio
BER
10-12
Unit Interval
UI
799.92
800
800.08
ps
2
AC Coupling Capacitor
CTX
5
200
nF
3
Notes:
1. Measured at receiver.
2. Each UI is 800 ps ± 100 ppm.
3. The external AC coupling capacitor is required. It is recommended to be placed near the device transmitter outputs.
Time (UI)
0
0.275
0.4
0.6
0.725
- VRX_DIFFp-p-min/2
VRX_DIFFp-p-min/2
− VRX_DIFFp-p-max/2
VRX_DIFFp-p-max/2
0
1



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