| поискавой системы для электроныых деталей |
|
TLE6281G датащи(PDF) 10 Page - Infineon Technologies AG |
|
|
|||||||||||||||||||||||||||||
TLE6281G датащи(HTML) 10 Page - Infineon Technologies AG |
|
10 / 15 page ![]() Data Sheet TLE 6281G Data Sheet 10 Rev 2.3 2007-01-11 tors. This means, that the bootstrap capacitor needs a minimum charging time of about 1µs, if the highside switch is operated in PWM mode (e.g. with 20kHz a maximum duty cycle of 96% can be reached). The exact value for the upper limit is given by the RC time formed by the impedance of the internal bootstrap diode and the capacitor formed by the external Mos- fet (CMosfet=QGate / VGS). The size of the bootstrap capacitor has to be adapted to the external MOSFET the driver IC has to drive. Usually the bootstrap capacitor is about 10-20 times big- ger than CMosfet. External components at the Vs Pin have to be considered, too. The charge pump is active when the highside switch is “ON” and the voltage level at the SHx is higher than 4V. Only under these conditions the bootstrap capacitor is charged by the charge pump. Estimation of power loss within the Driver IC The power loss within the Driver IC is strongly dependent on the use of the driver and the external components. Nevertheless a rough estimation of the worst case power loss is pos- sible. Worst case calculation is: PLoss = (Qgate*n*const* fPWM + IVS(open))* VVs - PRGate With: PLoss = Power loss within the Driver IC fPWM = Switching freqency Qgate = Total gate charge of used MOSFETs at 10V VGS n = Number of switched MOSFETs const = Constant considering some leakage current in the driver (about 1.2) IVS(open) = Current consumption of driver without connected Mosfets during switching VVS = Voltage at Vs PRGate = Power dissipation in the external gate resistors This value can be reduced dramatically by usage of external gate resistors. Conditions : Junction temperature Tj = 25 oC Number of switched MOSFET n = 2 Power dissipation in the external gate resistors PRGate = 0,2*PLoss Estimated Power Loss PLOSS within the Driver IC for different supply voltages Vs at QG = 100nC @ VGS = 10V 0 0,1 0,2 0,3 0,4 0,5 0,6 0,7 0,8 0 10 203040 5060 PWM Frequency (kHz) Vs = 8V Vs = 14V Vs = 18V Estimated Power Loss PLOSS within the Driver IC for different gate charges QG at supply voltage Vs = 14V 0 0,1 0,2 0,3 0,4 0,5 0,6 0,7 0,8 0 102030 4050 60 PWM Frequency (kHz) QG = 50nC QG = 100nC QG = 200nC |
|
|
ссылки URL |
| Вашему бизинису помогли Аллдатащит? [ DONATE ] |
Что такое Аллдатащит | реклама | контакт | Конфиденциальность | Ссылка на техническое описание | обмен ссыками | поиск по производителю All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |