Data Sheet

10

Rev. 1.5, 2007-03-20

TLE 4268

Reset Timing

The power-on reset delay time is defined by the charging time of an external capacitor

C

C

(1)

Definitions:

•

C

•

•

I

•

•

V

The reset reaction time

t

LOW after the output voltage has dropped below the reset threshold. It is typically 1

µs

for delay capacitor of 47 nF. For other values for

C

using the following equation:

t

(2)

Figure 5

Timing (Watchdog disabled)

AED03010

Thermal

Power-on-Reset

Voltage Dip

Secondary

Overload

at Output

Spike

D,c

Ι

=

V

d

dt

V

Q

Q, rt

V

<

rr

t

at Input

Undervoltage

Shutdown

t

D

V

t

t

t