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RD0802

4. Functional Description

The IRPLDIM5E reference design is built on the IRS2530D (DIM8

The lamp arc current is detected through RCS after ignition and added to a DC control

voltage to provide an AC signal with a positive offset at the DIM pin of IC1. During DIM

mode the IRS2530D adjusts the oscillator frequency in order to maintain the amplitude of

this feedback signal such that the negative going peak is regulated at the 0V reference. In

this way the peak to peak AC feedback signal amplitude is regulated to twice the DC

control voltage level.

The IRS2530D incorporates a voltage controlled oscillator, whereby the voltage at the

VCO pin determines the frequency. This is also used to realize the preheat and ignition

ramp required to start the lamp. At switch on the voltage at the VCO pin will steadily rise

from 0V. At 0V the frequency will be at its maximum level, which is considerably above the

open circuit resonant point. As the voltage increases, the frequency gradually falls and the

voltage at the lamp increases as well as the current in the cathodes. This configuration

utilizes voltage mode heating, which is provided by means of two auxiliary windings on the

resonant output inductor of the ballast circuit. This method is the simplest and cheapest,

however current mode heating could be used if an additional transformer were to be

added to sense the arc current.

As the frequency continues to fall, the voltage at the ballast output to the lamp increases

until it reaches a point where it is sufficient to ignite the lamp. At this point arc current

begins to flow in the lamp and a feedback signal is produced at the current sense resistor

RCS. If ignition fails then the IRS2530D will shut down, going into a low VCC current fault

mode.

The dimming control reference voltage is provided at the DIM pin of IC1 and generated by

the micro controller IC2 at output GP2. GP pins refer to general purpose I/O pins of the

micro controller, which can be configured by software as high impedance inputs or CMOS

outputs. The DC dimming control voltage is produced by means of an RC integrating filter

supplied by a square wave signal. The square wave signal is generated by the micro

controller, which generates a fixed frequency signal with four separate duty cycle modes.

The higher the duty cycle, the higher the resulting filtered DC dimming control voltage

(Figure 4.1).

The GP1 input of the micro controller IC2 is also connected to the AC line input voltage

through a filter circuit with a very short delay. This allows IC2 to detect very rapidly when

AC power has been removed and restored. The 5V VDD supply storage capacitor C1 is

sufficiently large to allow IC2 to continue to run for more than one second after AC power

has been removed from the ballast. When the AC line is switched off, IC2 detects this

rapidly and starts a timer from this point. If power is restored within one second, the

dimming level is reduced by one level, thus reducing the output square wave duty cycle

and reducing the dimming level by one step. If the dimming level was already at minimum

then it will cycle back to maximum. In the case of AC power being removed for more than

one second the dimming level will not be changed. After C1 has discharged below the

minimum VDD operating voltage of IC2 the micro controller will shut off.

EEPROM non-volatile memory. The EEPROM allows the micro to store the last dim level