TLE 6711

Circuit Description

Data Sheet

13

Rev. 3.4, 2007-08-16

4.3.1

Boost Status Output OVL

For supervision of the Boost output voltage an open drain DMOS output is used. The output is high impedance in

normal operation and low during the warning.

The OVL goes LOW if the PWM comparator output (see Figure 8) remains HIGH for clock time period. This occurs

when the Error-Signal falls below the minimum value of the Error-Ramp, this mean that Boost voltage falls below

a certain threshold voltage.

The OVL output used as a warning for insufficient Boost voltage.

4.4

Buck Converter

A stabilized logic supply voltage (typ. 5 V) for general purpose is realized in the system by a buck converter. An

external buck-inductance

L

frequency (pin R).

The buck regulator supply is given by the boost converter output

V

stored energy of the boost converter capacitor is used.

Like the boost converter, the buck converter uses the temperature compensated bandgap reference voltage

(typ. 2.8 V) for its regulation loop.

This reference voltage is connected to the non-inverting input of the error amplifier and an internal voltage divider

supplies the inverting input. Therefore the output voltage

V

The output of the error amplifier goes to the inverting input of the PWM comparator as well as to the buck

compensation output BUC.

When the error amplifier output voltage exceeds the sawtooth voltage the output power MOS-transistor is switched

on. So the duration of the output transistor conduction phase depends on the

V

variable pulse width is generated.

Figure 10

Buck Converter Block Diagram

AEB02947

-

+

=

thOV

V

VCC3

R

39.7k

Ω

VCC4

10.3k

R

Ω

GND

BUC

Pin 6

Pin 7

CC

V

1.2 V

V

CC

2.8 V

V

Ω

VCC1

Ω

VCC2

28k

R

22k

R

GND

=

REF

CC

V

Error

AMP

R

Prot1

Ω

200

COMP

PWM

Error-

Signal

r

tt

max

V

min

V

t

Pin 1

R

V

high

low

V

t t

t

Error-

Ramp

Oscillator

Schmitt-trigger 1

H when

Error-Signal

<

Error-Ramp

&

&

R

S

Q

Q

L when

> 175 ˚C

j

T

Clock

Error-FF

NOR 1

1

H when

L when

Overcurrent

Output Stage

OFF when H

OFF when H

OV

COMP

&

S

NAND 2

&

Q

Q

&

R

PWM-FF

1

INV

OFF

ON

Gate

Driver

Power

D-MOS

Boost

Driver

Supply

BDS

Pin 10

Pin 8

BUO

COMP

UV

H when

V

=

GND

thUV

4 V

V

GND

H =

H =

OC

COMP

18 mV

thOC

V

L when

Overcurrent

Pin 9

Boost

V

R

18 m

Sense

Ω

GND

Ramp