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ST10F272Z2T3 датащи(PDF) 153 Page - STMicroelectronics |
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ST10F272Z2T3 датащи(HTML) 153 Page - STMicroelectronics |
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153 / 189 page ![]() ST10F272Z2 Electrical characteristics 153/189 Figure 45. Anti-aliasing filter and conversion rate The considerations above lead to impose new constraints to the external circuit, to reduce the accuracy error due to the voltage drop on CS; from the two charge balance equations above, it is simple to derive the following relation between the ideal and real sampled voltage on CS: From this formula, in the worst case (when VA is maximum, that is for instance 5 V), assuming to accept a maximum error of half a count (~2.44mV), it is immediately evident a constraints on CF value: In the next section an example of how to design the external network is provided, assuming some reasonable values for the internal parameters and making hypothesis on the characteristics of the analog signal to be sampled. Example of external network sizing The following hypothesis are formulated in order to proceed in designing the external network on A/D Converter input pins: ● Analog Signal Source Bandwidth (f0):10 kHz ● conversion Rate (fC):25 kHz ● Sampling Time (TS):1 µs ● Pin Input Capacitance (CP1):5 pF ● Pin Input Routing Capacitance (CP2):1 pF ● Sampling Capacitance (CS):4 pF ● Maximum Input Current Injection (IINJ):3 mA ● Maximum Analog Source Voltage (VAM):12 V ● Analog Source Impedance (RS):100 Ω ● Channel Switch Resistance (RSW):500 Ω ● Sampling Switch Resistance (RAD):200 Ω f0 f Analog Source Bandwidth (VA) f0 f Sampled Signal Spectrum (fC = conversion Rate) fC f Anti-Aliasing Filter (fF = RC Filter pole) fF 2 f0 ≤ fC (Nyquist) fF = f0 (Anti-aliasing Filtering Condition) TC ≤ 2 RFCF (Conversion Rate vs. Filter Pole) Noise V A V A2 ----------- C P1 C P2 +C F + C P1 C P2 +C F C S ++ ------------------------------------------------------------ = CF 2048 CS ⋅ > |
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