Quad SPST CMOS Analog Switches

6

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POWER SUPPLIES

-5V

+5V

-10V

+10V

-15V

+15V

±5V

350

Ω

380

Ω

————

±10V

—

—

165

Ω

250

Ω

——

±15V

—

—

125

Ω

160

Ω

135

Ω

155

Ω

Protecting Against Fault

Conditions

Fault conditions occur when power supplies are turned

off when input signals are still present, or when over-

voltages occur at the inputs during normal operation. In

either case, source-to-body diodes can be forward

biased and conduct current from the signal source. If

this current is required to be kept to low (µA) levels

then the addition of external protection diodes is rec-

ommended.

To provide protection for overvoltages up to 20V above

the supplies, a 1N4001 or 1N914 type diode should be

placed in series with the positive and negative supplies

as shown in Figure 2. The addition of these diodes will

reduce the analog signal range to 1V below the posi-

tive supply and 1V above the negative supply.

16

15

14

13

12

11

10

9

1

2

3

4

5

6

7

8

DG201A

DG211

IN4001

-15V

IN4001

+15V

Figure 2. Protection against Fault Conditions

LOGIC "0" - SW ON

3V

0

LOGIC

INPUT

SWITCH

INPUT

SWITCH

OUTPUT

50%

0

0.9

0.9

0.1

Ω

SWITCH

INPUT

LOGIC

INPUT

GND

0

V-

-15V

+15V

V+

1k

Ω

35pF

SWITCH

OUTPUT

TOP VIEW

16

15

14

13

5

1

2

3

4

12

11

10

9

67

8

S1

V-

GND

S4

S2

V+

N.C.

S3

D1

IN1

IN2

D2

D4

IN4

IN3

D3

DG201A

DG211

QFN*

Pin Configurations (continued)

Figure 1. Switching Time