STM809/810/811/812

Operation

Doc ID 9873 Rev 5

7/21

2

Operation

2.1

Reset output

The STM809/810/811/812 microprocessor reset circuit asserts a reset signal to the MCU

(MR) is taken low (see

Figure 14 on page 13). RST (active high for STM810/812) is

active-low reset (RST) and active-high reset (RST) both source and sink current.

2.2

Push-button reset input (STM811/812)

returns high. The MR input has an internal 20 k

Ω pull-up resistor, allowing it to be left open if

not used. This input can be driven with TTL/CMOS-logic levels or with open-drain/collector

outputs. Connect a normally open push-button switch from MR to GND to create a manual

reset function; external debounce circuitry is not required. If the device is used in a noisy

environment, connect a 0.1 µF capacitor from MR to GND to provide additional noise

immunity.

2.3

Figure 12 on page 11 shows typical transient duration versus reset comparator overdrive

(for which the STM809/810/811/812 will NOT generate a reset pulse). The graph was

threshold and ending below it by the magnitude indicated (comparator overdrive). The graph

reset pulse. As the magnitude of the transient increases (further below the threshold), the

maximum allowable pulse width decreases. Any combination of duration and overdrive

goes 100 mV below the reset threshold and lasts 20 µs or less will not cause a reset pulse.

transient immunity.