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M40SZ100Y датащи(PDF) 17 Page - STMicroelectronics |
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M40SZ100Y датащи(HTML) 17 Page - STMicroelectronics |
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17 / 24 page ![]() M40SZ100Y, M40SZ100W DC and AC parameters Doc ID 7528 Rev 3 17/24 Table 7. DC characteristics Sym Parameter Test condition(1) M40SZ100Y M40SZ100W Unit Min Typ Max Min Typ Max ICC Supply current Outputs open 1 0.5 mA ICCDR Data retention mode current(2) 50 200 50 200 nA ILI (3) Input leakage current 0 V ≤ VIN ≤ VCC ±1 ±1 µA Input leakage current (PFI) –25 2 25 –25 2 25 nA ILO (4) Output leakage current 0 V ≤ VOUT ≤ VCC ±1 ±1 µA IOUT1 (5) V OUT current (active) VOUT > VCC – 0.3 175 100 mA IOUT2 VOUT current (battery backup) VOUT > VBAT – 0.3 100 100 µA VBAT Battery voltage 2.5 3.0 3.5(6) 2.5 3.0 3.5(6) V VIH Input high voltage 0.7VCC VCC + 0.3 0.7VCC VCC + 0.3 V VIL Input low voltage –0.3 0.3VCC –0.3 0.3VCC V VOH Output high voltage(7) IOH = –1.0 mA 2.4 2.4 V VOHB VOH battery backup (8) IOUT2 = –1.0 µA 2.5 2.9 3.5 2.5 2.9 3.5 V VOL Output low voltage IOL = 3.0 mA 0.4 0.4 V Output low voltage (open drain)(9) IOL = 10 mA 0.4 0.4 V VPFD Power-fail deselect voltage 4.20 4.4 0 4.50 2.55 2.60 2.70 V VPFI PFI input threshold VCC = 5 V(Y) VCC = 3 V(V) 1.225 1.2 50 1.275 1.225 1.25 0 1.275 V PFI hysteresis PFI rising 20 70 20 70 mV VSO Battery backup switchover voltage 2.5 2.5 V 1. Valid for ambient operating temperature: TA = –40 to 85 °C; VCC = 2.7 to 3.6 V or 4.5 to 5.5 V(except where noted). 2. Measured with VOUT and ECON open. 3. RSTIN internally pulled-up to VCC through 100 kΩ resistor. 4. Outputs deselected. 5. External SRAM must match SUPERVISOR chip VCC specification (3 V or 5 V). 6. For rechargeable backup, VBAT (max) may be considered VCC – 0.5 V. 7. For PFO pin (CMOS). 8. Chip enable output (ECON) can only sustain CMOS leakage currents in the battery backup mode. Higher leakage currents will reduce battery life. 9. For RST & BL pins (open drain). |
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