6402 datasheet(28/250 Pages) INTEL

28 / 250 page

DDR Interface

Intel® 6400/6402 Advanced Memory Buffer Datasheet

3.5

Refresh

The AMB is required to manage DRAM refresh during channel resets and when the

auto-refresh function is enabled. During channel resets, the Self-Refresh FSM takes

control of the DDR command bus and places the DRAMs in self-refresh mode. The

Auto-Refresh FSM generates auto-refresh commands when the DAREFTC.AREFEN bit is

set. The Self-Refresh FSM will override and take control away from the Auto-Refresh

FSM when a reset event occurs.

A self-refresh entry command can also be generated by programming the DCALCSR

and (E)MRS command section.

DQS7

Write DQS

DQ[59:56]

Write DQS

DQ[63:56]

DQS15

Write DQS

DQ[55:52]

N/A

DQS6

Write DQS

DQ[51:48]

Write DQS

DQ[55:48]

DQS14

Write DQS

DQ[47:44]

N/A

DQS5

Write DQS

DQ[43:40]

Write DQS

DQ[47:40]

DQS13

Write DQS

DQ[39:36]

N/A

DQS4

Write DQS

DQ[35:32]

Write DQS

DQ[39:32]

DQS12

Write DQS

DQ[31:28]

N/A

DQS3

Write DQS

DQ[27:24]

Write DQS

DQ[31:24]

DQS11

Write DQS

DQ[23:20]

N/A

DQS2

Write DQS

DQ[19:16]

Write DQS

DQ[23:16]

DQS10

Write DQS

DQ[15:12]

N/A

DQS1

Write DQS

DQ[11:8]

Write DQS

DQ[15:8]

DQS9

Write DQS

DQ[7:4]

N/A

DQS0

Write DQS

DQ[3:0]

Write DQS

DQ[7:0]

Table 3-1.

DQS Association with DQ/CB Pins in x8 and x4 Mode

DQS Pin

x4 Mode: MTR.WIDTH=0

x8 Mode: MTR.WIDTH=1

Output

Function

Input/Output

Data Mapping

Output

Function

Input/Output

Data Mapping

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