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74LVC2T45GD датащи(PDF) 15 Page - NXP Semiconductors |
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74LVC2T45GD датащи(HTML) 15 Page - NXP Semiconductors |
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15 / 36 page ![]() 74LVC_LVCH2T45 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved. Product data sheet Rev. 4 — 20 August 2010 15 of 36 NXP Semiconductors 74LVC2T45; 74LVCH2T45 Dual supply translating transceiver; 3-state [1] tPZH and tPZL are calculated values using the formula shown in Section 14.4 “Enable times”. 12. Waveforms tPZH OFF-statetoHIGH propagation delay DIR to A [1] - 26.1 - 20.9 - 13.5 - 12.6 - 9.3 ns DIR to B [1] - 22.4 - 20.8 - 12.4 - 10.1 - 8.4 ns tPZL OFF-state to LOW propagation delay DIR to A [1] - 31.0 - 25.5 - 15.8 - 13.2 - 10.2 ns DIR to B [1] - 22.9 - 19.5 - 12.9 - 11.0 - 9.9 ns Table 13. Dynamic characteristics for temperature range −40 °C to +125 °C …continued Voltages are referenced to GND (ground = 0 V); for test circuit see Figure 9; for wave forms see Figure 7 and Figure 8. Symbol Parameter Conditions VCC(B) Unit 1.5 V ± 0.1 V 1.8 V ± 0.15 V 2.5 V ± 0.2 V 3.3 V ± 0.3 V 5.0 V ± 0.5 V Min Max Min Max Min Max Min Max Min Max Measurement points are given in Table 14. VOL and VOH are typical output voltage levels that occur with the output load. Fig 7. The data input (A, B) to output (B, A) propagation delay times 001aaj644 nA, nB input nB, nA output tPLH tPHL GND VI VOH VM VM VOL Measurement points are given in Table 14. VOL and VOH are typical output voltage levels that occur with the output load. Fig 8. Enable and disable times 001aae968 tPZL tPZH tPHZ tPLZ GND GND VI VCCO VOL VOH VM VM VM VX VY outputs disabled outputs enabled outputs enabled output LOW-to-OFF OFF-to-LOW output HIGH-to-OFF OFF-to-HIGH DIR input |
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