PCA2000_2001

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© NXP B.V. 2010. All rights reserved.

Product data sheet

Rev. 08 — 23 August 2010

8 of 30

NXP Semiconductors

PCA2000; PCA2001

32 kHz watch circuit with programmable adaptive motor pulse

The oscillator frequency can be measured at pad RESET, where a square wave signal

with the frequency of

is provided.

This frequency shows a jitter every minute or every two minutes, depending on the

programmed calibration period, which originates from the time calibration.

Details on how to measure the oscillator frequency and the programmed inhibition time

are given in Section 7.10.

7.4 Reset

At pad RESET an output signal with a frequency of

is provided.

mode. In this mode the motor output frequency is 32 Hz, which can be used to test the

mechanical function of the watch.

After releasing the pad RESET, the motor starts exactly one second later with the smallest

duty cycle and with the opposite polarity to the last pulse before stopping.

The debounce time for the RESET function is between 31 ms and 62 ms.

7.5 Programming possibilities

The programming data is stored in OTP cells (EPROM cells). At delivery, all memory cells

are in state 0. The cells can be programmed to the state 1, but then there is no more set

back to state 0.

The programming data is organized in an array of four 8-bit words: word A contains the

time calibration, words B and C contain the setting for the monitor pulses and word D

contains the type recognition (see Table 4).

1

1024

------------

f

osc

×

1

1024

------------

f

osc

×

32 Hz

=

Table 4.

Words and bits

Word

Bit

1

2

3

4

5

6

7

8

A

number of 8192 Hz pulses to be removed

calibration

period

B

lowest stage: duty cycle

number of driving stages

highest

stage:

duty cycle

pulse

stretching

factory test bits

C

pulse width

maximum time delay between positive

and negative detection pulses

EOL voltage factory test

bit

D

type

factory test bits