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LP38511 датащи(PDF) 4 Page - National Semiconductor (TI)

[Old version datasheet] Texas Instruments acquired National semiconductor.
номер детали LP38511
подробное описание детали  800 mA Fast-Transient Response Low-Dropout Linear Voltage Regulator with Error Flag
PDF  14 Pages
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производитель  NSC [National Semiconductor (TI)]
домашняя страница  http://www.national.com
Logo NSC - National Semiconductor (TI)

LP38511 датащи(HTML) 4 Page - National Semiconductor (TI)

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Symbol
Parameter
Conditions
Min
Typ
Max
Units
ERROR Flag
V
TH
Error Flag Threshold
(Note 9)
V
OUT rising threshold where
ERROR Flag goes high
78
90
98
%
V
OUT falling threshold where
ERROR Flag goes low
74
85
93
V
ERROR(SAT)
ERROR Flag Saturation
Voltage
I
SINK = 1 mA
-
12.5
45
mV
I
lk
ERROR Flag Pin Leakage
Current
V
ERROR = 5.5V
-
1
-
nA
t
d
ERROR Flag Delay time
-
1
-
µs
AC Parameters
PSRR
Ripple Rejection
V
IN = 2.5V
f = 120Hz
-
73
-
dB
V
IN = 2.5V
f = 1 kHz
-
73
-
e
n
Output Noise Density
f = 120Hz
-
2
-
nV/
Hz
Output Noise Voltage
BW = 100Hz – 100kHz
-
75
-
µV (rms)
Thermal Characteristics
T
SD
Thermal Shutdown
T
J rising
-
165
-
°C
ΔT
SD
Thermal Shutdown Hysteresis TJ falling from TSD
-
10
-
θ
JA
Thermal Resistance
Junction to Ambient
(Note 4)
TO-263 and TO-263 THIN
-
60
-
°C/W
PSOP-8
-
168
-
θ
JC
Thermal Resistance
Junction to Case
TO-263 and TO-263 THIN
-
3
-
°C/W
PSOP-8
-
11
-
Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is
intended to be functional, but does not guarantee specific performance limits. For guaranteed specifications and conditions, see the Electrical Characteristics.
Note 2: The human body model is a 100pF capacitor discharged through a 1.5k
Ω resistor into each pin. Test method is per JESD22-A114.
Note 3: Refer to JEDEC J-STD-020C for surface mount device (SMD) package reflow profiles and conditions. Unless otherwise stated, the temperatures and
times are for Sn-Pb (STD) only.
Note 4: Device operation must be evaluated, and derated as needed, based on ambient temperature (T
A), power dissipation (PD), maximum allowable operating
junction temperature (T
J(MAX)), and package thermal resistance (θJA).
Note 5: Output voltage line regulation is defined as the change in output voltage from the nominal value (
ΔV
OUT) due to a change in the voltage at the input
(
ΔV
IN).
Note 6: Output voltage load regulation is defined as the change in output voltage from the nominal value (
ΔV
OUT) due to a change in the load current at the output
(
ΔI
OUT).
Note 7: The line and load regulation specification contains only the typical number. However, the limits for line and load regulation are included in the output
voltage tolerance specification.
Note 8: Dropout voltage is defined as the minimum input to output differential voltage at which the output drops 2% below the nominal value. For the LP38511-1.8,
the minimum V
IN operating voltage is the limiting factor.
Note 9: The ERROR Flag thresholds are specified as percentage of the nominal regulated output voltage. See Application Information.
www.national.com
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