Applications Information

INPUT CAPACITOR SELECTION

LP2966EP requires a minimum input capacitance of 1µF

between the input and ground pins to prevent any imped-

ance interactions with the supply. This capacitor should be

located very close to the input pin. This capacitor can be of

any type such as ceramic, tantalum, or aluminium. Any good

quality capacitor which has good tolerance over temperature

and frequency is recommended.

OUTPUT CAPACITOR SELECTION

The LP2966EP requires a minimum of 1µF capacitance on

each output for proper operation. To insure stability, this

capacitor should maintain its ESR (equivalent series resis-

tance) in the stable region of the ESR curves (Figure 1 and

Figure 2 over the full operating temperature range of the

application. The output capacitor should have a good toler-

ance over temperature, voltage, and frequency. The output

capacitor can be increased without limit. Larger capacitance

provides better stability and noise performance. The output

capacitor should be connected very close to the Vout pin of

the IC.

LP2966EP works best with Tantalum capacitors. However,

the ESR and the capcitance value of these capacitors vary a

lot with temperature, voltage, and frequency. So while using

Tantalum capacitors, it should be ensured that the ESR is

within the limits for stability over the full operating tempara-

ture range.

For output voltages greater than 2.5V, good quality ceramic

capacitors (such as the X7R series from Taiyoyuden) can

also be used with LP2966EP in applications not requiring

again, it should be ensured that the capacitance value and

the ESR are within the limits for stability over the full oper-

ating temperature range.

The ESRD Series Polymer Aluminium Electrolytic capacitors

from Cornell Dubilier are very stable over temperature and

frequency. The excellent capacitance and ESR tolerance of

these capacitors over voltage, temperature and frequency

make these capacitors very suitable for use with LDO regu-

lators.

OUTPUT NOISE

Noise is specified in two ways-

Spot Noise or Output noise density is the RMS sum of all

noise sources, measured at the regulator output, at a spe-

cific frequency (measured with a 1Hz bandwidth). This type

of noise is usually plotted on a curve as a function of fre-

quency.

Total output Noise or Broad-band noise is the RMS sum

of spot noise over a specified bandwidth, usually several

decades of frequencies.

Attention should be paid to the units of measurement. Spot

noise is measured in units µV/

noise is measured in µV(rms).

The primary source of noise in low-dropout regulators is the

internal reference. In CMOS regulators, noise has a low

frequency component and a high frequency component,

which storngly depend on the silicon area and quiescent

current. Noise can be reduced in two ways: by increasing the

transistor area or by increasing the current drawn by the

internal reference. Increasing the area will increase the die

size and decreases the chance of fitting the die into a small

package. Increasing the current drawn by the internal refer-

ence increases the total supply current (ground pin current)

of the IC. Using an optimized trade-off of ground pin current

and die size, LP2966EP achieves low noise performance

with low quiescent current in an MSOP-8 package.

SHORT-CIRCUIT FOLDBACK PROTECTION

In the presence of a short or excessive load current condi-

tion, the LP2966EP uses an internal short circuit foldback

mechanism that regulates the maximum deliverable output

current. A strong negative temperature coefficient is de-

signed into the circuit to enable extremely higher peak output

current capability (in excess of 400mA per output at room

temperature, see typical curves). Thus, a system designer

using the LP2966EP can achieve higher peak output current

capability in applications where the LP2966EP internal junc-

tion temperature is kept below 125˚C. Refer to the applica-

tions section on calculating the maximum output current

capability of the LP2966EP for your application.

ERROR FLAG OPERATION

The LP2966EP produces a logic low signal at the Error Flag

pin (ERROR) when the corresponding output drops out of

regulation due to low input voltage, current limiting, or ther-

mal limiting. This flag has a built in Hysteresis. The timing

diagram in Figure 3 shows the relationship between the

20099311

FIGURE 1. ESR Curve for V

20099312

FIGURE 2. ESR Curve for V

2.2µF

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