3–2

　　　　

Chapter 3: Serial Configuration Devices (EPCS1, EPCS4, EPCS16, EPCS64, and EPCS128) Data Sheet

Functional Description

Configuration Handbook (Complete Two-Volume Set)

© December 2009

Altera Corporation

Functional Description

With SRAM-based devices that support active serial configuration, configuration data

must be reloaded each time the device powers up, the system reconfigures, or when

new configuration data is required. Serial configuration devices are flash memory

devices with a serial interface that can store configuration data for FPGA devices that

support active serial configuration and reload the data to the device upon power-up

or reconfiguration. Table 3–1 summarizes the features of the Altera configuration

devices and the amount of configuration space they hold.

For an 8-pin SOIC package, you can migrate vertically from the EPCS1 to the EPCS4

or EPCS16 because the EPCS devices are offered in the same device package.

Similarly, for a 16-pin SOIC package, you can migrate vertically from the EPCS16 to

the EPCS64 or EPCS128.

Use the compression ratio calculation to determine the FPGA device to fit the EPCS.

With the new data-decompression feature in Arria series, Cyclone series, and all

device families in the Stratix series except the Stratix device family, you can use

smaller serial configuration devices to configure larger FPGAs.

configuration chapter in the appropriate device handbook.

Table 3–1. Altera Configuration Devices (Note 1), (2)

Device

Memory Size

(bits)

On-Chip

Decompression

Support

ISP

Support

Cascading

Support

Reprogrammable

Operating

Voltage (V)

EPCS1

1,048,576

No

Yes

No

Yes

3.3

EPCS4

4,194,304

No

Yes

No

Yes

3.3

EPCS16

16,777,216

No

Yes

No

Yes

3.3

EPCS64

67,108,864

No

Yes

No

Yes

3.3

EPCS128

134,217,728

No

Yes

No

Yes

3.3

Notes to Table 3–1:

(1) To program these devices using Altera Programming Unit or Master Programming Unit, refer to Altera Programming Hardware Data Sheet.

(2) The EPCS device can be re-programmed in system with Byte Blaster II download cable or an external microprocessor using SRunner. For more

information about SRunner, refer to the AN418, SRunner: An Embedded Solution for EPCS Programming.

Example 3–1. Compression Ratio Calculation

EP4SGX530 = 189,000,000 bits

EPCS128 = 134,217,728 bits

Preliminary data indicates that compression typically reduces the configuration

bitstream size by 35% to 55%. We take the worst case that is 35% compression.

189,000,000 bits × 0.65 = 122,850,000 bits

It fits EPCS128 device.