13

FN7490.1

March 9, 2006

The FB+ pin is used as a REF terminal to center or to adjust

the output. Because the FB+ pin is a high impedance input,

an economical resistor divider can be used to set the voltage

at the REF terminal without degrading or affecting the CMRR

performance. Any voltage applied to the REF terminal will

shift VOUT by VREF times the closed loop gain, which is set

by resistors RF and RG. See Figure 42.

The FB+ pin can also be connected to the other end of

resistor, RG. See Figure 43. Keeping the basic concept that

the EL8170 and EL8173 in-amps maintain constant

differential voltage across the input terminals and feedback

terminals (IN+ - IN- = FB+ - FB-), the transfer function of

Figure 43 can be derived.

A finite resistance RS in series with the VREF source, adds

an output offset of VIN*(RS/RG). As the series resistance Rs

approaches zero, the gain equation is simplified to the above

equation for Figure 43. VOUT is simply shifted by an amount

VREF.

External Resistor Mismatches

Because of the independent pair of feedback terminals

provided by the EL8170 and EL8173, the CMRR is not

degraded by any resistor mismatches. Hence, unlike a three

op amp and especially a two op amp in-amp, the EL8170

and EL8173 reduce the cost of external components by

allowing the use of 1% or more tolerance resistors without

sacrificing CMRR performance. The EL8170 and EL8173

CMRR will be 108dB regardless of the tolerance of the

resistors used.

Gain Error and Accuracy

The EL8173 has a Gain Error, EG, of 0.2% typical. The

EL8170 has an EG of 0.3% typical. The gain error indicated

in the electrical specifications table is the inherent gain error

of the EL8170 and EL8173 and does not include the gain

error contributed by the resistors. There is an additional gain

error due to the tolerance of the resistors used. The resulting

non-ideal transfer function effectively becomes:

Where:

ERG = Tolerance of RG

ERF = Tolerance of RF

EG = Gain Error of the EL8170 or EL8173

The term [1 - (ERG +ERF +EG)] is the deviation from the

theoretical gain. Thus, (ERG +ERF +EG) is the total gain

error. For example, if 1% resistors are used for the EL8170,

the total gain error would be:

Disable/Power-Down

The EL8170 and EL8173 can be powered down reducing

the supply current to typically 2.9µA. When disabled, the

output is in a high impedance state. The active low ENABLE

bar pin has an internal pull down and hence can be left

floating and the in-amp enabled by default. When the

ENABLE bar is connected to an external logic, the in-amp

will power down when ENABLE bar is pulled above 2V, and

will power on when ENABLE bar is pulled below 0.8V.

FIGURE 43. REFERENCE CONNECTIONWITH AN AVAILABLE

VREF

1

3

2

8

5

4

7

6

+

-

+

-

IN+

IN-

FB+

FB-

VS+

VS-

EN

2.9V to 5V

RF

RG

VOUT

EN_BAR

EL8170/3

VCM

VIN/2

VIN/2

VREF

VOUT

1

--------

+







VIN

()

VREF

()

+

=

VOUT

1

--------

+







++

()

–

[] VIN

×

×

=

()

++

()

±

=

0.01 0.01 0.003

++

()

±

=

2.3%

±

=

EL8170, EL8173