NB3N502DEVB

http://onsemi.com

2

SETUP FOR MEASUREMENTS

Basic Equipment

Power Supply Connections

External power supply of +3 V to +5.5 V must be

provided to the board.

ground pin, GND. Connect a single power supply to the

positive supply, +3 V to +5.5 V, and GND to 0 V. Power

provided at the top corners of the board.

Table 1. POWER SUPPLY CONNECTIONS

Supply

Value

Connector

+3 to +5.5 V

Red Banana Plug

GND

0 V

Black Banana Plug

Figure 2. Power Supply Connections

+3.0 V to +5.5 V

Power Supplies

GND

+

−

External Reference Clock

An SMA connector is provided for X1/CLK if an external

clock source is used on Pin 1. The metal trace at the package

pin is intentionally open for crystal use and must be shorted

for a connection to Pin 1 for external clock use.

Crystal and Crystal Load Capacitors Selection Guide

A through−hole or surface mount crystal can be used. The

metal traces at the crystal pins are intentionally open for

crystal use and will have no impedance effect on the crystal

pins.

The total on−chip capacitance is approximately 12 pF per

pin (CIN1 and CIN2). A parallel resonant, fundamental

mode crystal should be used. The evaluation board includes

pads for small capacitors from X1/CLK to ground and from

X2 to ground. These capacitors, CL1 and CL2, are used to

adjust the stray capacitance of the board to match the

nominally required crystal load capacitance (CLOAD

(crystal)). Crystal load capacitors must be connected from

each of the pins X1 and X2 to ground. The load capacitance

of the crystal (CLOAD (crystal)) must be matched by total

load capacitance of the oscillator circuitry network, CINX,

CSX and CLX, as seen by the crystal (see Figure 3 and

equations below).

CLOAD1 = CIN1 + CS1 + CL1

[Total capacitance on X1/CLK]

CLOAD2 = CIN2 + CS2 + CL2 [Total capacitance on X2]

CIN1

[ CIN2 [ 12 pF (Typ) [Internal capacitance]

CS1

[ CS2 [ 5 pF (Typ) [External PCB stray capacitance]

CLOAD1,2 = 2 – CLOAD (Crystal)

CL2 = CLOAD2 − CIN2 − CS2

[External load capacitance on X2]

CL1 = CLOAD1 − CIN1 − CS1

[External load capacitance on X1/CLK]

Figure 3. Using a Crystal as Reference Clock

Crystal

12pF

12pF

G

R

Internal

to Device

X1/CLK

X2

Control and Select Pins

The NB4N502 evaluation board is equipped with SMA

connectors to control the static input logic levels of the

Multiplier Select pins, S0 and S1 (see Table 2).

Pin S1 defaults to M when left open. Pin S0 defaults to H

when left open.

3−Position slide switches are also provided to control the

Multiplier Select pins. To use the switches, headers JMP3

and JMP4 must be shorted.