PIC16F720-ESLASHML datasheet(162/244 Pages) MICROCHIP

162 / 244 page

PIC16F/LF720/721

DS41430A-page 162

 2010 Microchip Technology Inc.

FIGURE 18-1:

FLASH PROGRAM MEMORY READ CYCLE EXECUTION – NORMAL MODE

18.2

Code Protection

When the device is code-protected, the CPU may

continue to read and write the Flash program memory.

Depending on the settings of the Flash program

memory enable (WRT<1:0>) bits, the device may or

may not be able to write certain blocks of the program

memory. However, reads of the program memory are

allowed.

When the Flash program memory Code Protection

(CP) bit in the Configuration Word register is enabled,

the program memory is code-protected, and the device

programmer (ICSP™) cannot access data or program

memory.

18.3

PMADRH and PMADRL Registers

The PMADRH:PMADRL register pair can address up

to a maximum of 4K words of program Flash. The Most

Significant Byte (MSB) of the address is written to the

PMADRH register and the Least Significant Byte (LSB)

is written to the PMADRL register.

18.4

PMCON1 and PMCON2 Registers

PMCON1 is the control register for the data program

memory accesses.

Control bits RD and WR initiate read and write,

respectively. These bits cannot be cleared, but only set

in software. They are cleared in hardware at the

completion of the read or write operation. The inability

to clear the WR bit in software prevents the accidental

premature termination of a write operation. Setting the

control bit WR initiates a write operation. For program

memory writes, WR initiates a write cycle if FREE = 0

and an erase cycle if FREE = 1.

The WREN bit, when set, will allow a write operation.

On power-up, the WREN bit is clear. PMCON2 is not a

physical register. Reading PMCON2 will read all ‘0’s.

The PMCON2 register is used exclusively in the Flash

memory write sequence.

BSF PMCON1, RD

Executed here

Forced NOP

Executed here

Forced NOP

Executed here

PC + 1

PMADRH, PMADRL

PC+3

PC + 5

Flash ADDR

RD bit

INSTR (PC)

PMDATH, PMDATL

INSTR (PC + 3)

PC + 4

INSTR (PC + 4)

INSTR (PC + 1)

INSTR (PC - 1)

Executed here

INSTR (PC + 3)

Executed here

INSTR (PC + 4)

Executed here

Flash DATA

PMDATH

PMDATL

Force

NOP

Stop

Note:

Code-protect does not affect the CPU

from performing a read operation on the

program memory. For more information,

refer to Section 8.2 “Code Protection”.

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