116A datasheet(28/102 Pages) RENESAS

28 / 102 page

REJ03B0297-0100

Rev.1.00

Page 28 of 99

Jul 16, 2010

R32C/116A Group

2. Central Processing Unit (CPU)

2.2

Fast Interrupt Registers

The following three registers are provided to minimize the overhead of interrupt sequence.

2.2.1

Save Flag Register (SVF)

This 32-bit register is used to save the flag register when a fast interrupt is generated.

2.2.2

Save PC Register (SVP)

This 32-bit register is used to save the program counter when a fast interrupt is generated.

2.2.3

Vector Register (VCT)

This 32-bit register is used to indicate a jump address when a fast interrupt is generated.

2.3

DMAC-associated Registers

There are seven types of DMAC-associated registers.

2.3.1

DMA Mode Registers (DMD0, DMD1, DMD2, and DMD3)

These 32-bit registers are used to set DMA transfer mode, bit rate, etc.

2.3.2

DMA Terminal Count Registers (DCT0, DCT1, DCT2, and DCT3)

These 24-bit registers are used to set DMA transfer counting.

2.3.3

DMA Terminal Count Reload Registers (DCR0, DCR1, DCR2, and DCR3)

These 24-bit registers are used to set the reloaded values for DMA terminal count registers.

2.3.4

DMA Source Address Registers (DSA0, DSA1, DSA2, and DSA3)

These 32-bit registers are used to set DMA source addresses.

2.3.5

DMA Source Address Reload Registers (DSR0, DSR1, DSR2, and DSR3)

These 32-bit registers are used to set the reloaded value for DMA source address register.

2.3.6

DMA Destination Address Registers (DDA0, DDA1, DDA2, and DDA3)

These 32-bit registers are used to set DMA destination address.

2.3.7

DMA Destination Address Reload Registers (DDR0, DDR1, DDR2, and

DDR3)

These 32-bit registers are used to set reloaded values for DMA destination address registers.

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