поискавой системы для электроныых деталей
  Russian  ▼
ALLDATASHEETRU.COM

X  

Preview PDF HTML

ADIS16133/PCBZ датащи(PDF) 4 Page - Analog Devices

номер детали ADIS16133/PCBZ
подробное описание детали  짹1200째/sec Precision Angular Rate Sensor
PDF  20 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
производитель  AD [Analog Devices]
домашняя страница  http://www.analog.com
Logo AD - Analog Devices

ADIS16133/PCBZ датащи(HTML) 4 Page - Analog Devices

  ADIS16133/PCBZ Datasheet HTML 1Page - Analog Devices ADIS16133/PCBZ Datasheet HTML 2Page - Analog Devices ADIS16133/PCBZ Datasheet HTML 3Page - Analog Devices ADIS16133/PCBZ Datasheet HTML 4Page - Analog Devices ADIS16133/PCBZ Datasheet HTML 5Page - Analog Devices ADIS16133/PCBZ Datasheet HTML 6Page - Analog Devices ADIS16133/PCBZ Datasheet HTML 7Page - Analog Devices ADIS16133/PCBZ Datasheet HTML 8Page - Analog Devices ADIS16133/PCBZ Datasheet HTML 9Page - Analog Devices Next Button
Zoom Inzoom in Zoom Outzoom out
 4 / 20 page
background image
ADIS16133
Rev. 0 | Page 4 of 20
TIMING SPECIFICATIONS
TA = 25°C, VCC = 5 V, unless otherwise noted.
Table 2.
Normal Mode
Parameter
Description
Min1
Typ
Max
Unit
f
SCLK
Serial clock
0.01
2.0
MHz
t
STALL
Stall period between data
9
µs
t
READRATE
Read rate
25
µs
t
CS
Chip select to clock edge
48.8
ns
t
DAV
DOUT valid after SCLK edge
25
ns
t
DSU
DIN setup time before SCLK rising edge
24.4
ns
t
DHD
DIN hold time after SCLK rising edge
48.8
ns
t
SCLKR, tSCLKF
SCLK rise/fall times
5
12.5
ns
t
DR, tDF
DOUT rise/fall times
5
12.5
ns
t
SFS
CS high after SCLK edge
0
ns
t
1
Input sync positive pulse width
5
µs
t
x
Input sync low time
100
µs
t
2
Input sync to data ready output
360
µs
t
3
Input sync period
488
µs
1 Guaranteed by design and characterization but not tested in production.
Timing Diagrams
CS
SCLK
DOUT
DIN
1
2
3
4
5
6
15
16
R/W
A5
A6
A4
A3
A2
D2
MSB
DB14
D1
LSB
DB13
DB12
DB10
DB11
DB2
LSB
DB1
tCS
tSFS
tDAV
tDHD
tDSU
Figure 2. SPI Timing and Sequence
CS
SCLK
tREADRATE
tSTALL
Figure 3. Stall Time and Data Rate
t3
tX
t2
t1
SYNC
CLOCK (CLKIN)
DATA
READY
Figure 4. Input Clock Timing Diagram



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20


датащи скачать

Go To PDF Page


ссылки URL



Вашему бизинису помогли Аллдатащит?  [ DONATE ] 

Что такое Аллдатащит   |   реклама   |   контакт   |   Конфиденциальность   |   Ссылка на техническое описание    |   обмен ссыками   |   поиск по производителю
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com