SC418 datasheet(20/30 Pages) SEMTECH

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SC418

Applications Information (continued)

ENL Logic Control of PWM Operation

When the ENL input exceeds the VIN UVLO threshold of

2.6V, internal logic checks the PGOOD signal. If PGOOD is

high, the switcher is already running and the LDO will start

without affecting the switcher. If PGOOD is low, the device

disables PWM switching until the LDO output has reached

90% of its final value. This delay prevents the additional

current needed by the DH and DL gate drives from over-

loading the LDO at start-up.

In some cases it is desirable to use the V

IN UVLO feature for

the switcher without using the LDO. This can be done by

connecting the FBL pin directly to VDDA. This disables the

LDO, allowing the ENL pin to be used only for VIN UVLO for

the switcher.

LDO Start-up

Before LDO start-up, the device checks the status of the

following signals to ensure proper operation can be

maintained.

ENL pin

VLDO output

IN input voltage

When the ENL pin is high and V

IN is available, the LDO will

begin start-up. During the initial phase, when VLDO is

near zero, the LDO initiates a current-limited start-up

(typically 115mA) to charge the output capacitor. When

LDO has reached 90% of the final value (as sensed at the

FBL pin), the LDO current limit is increased to 200mA and

the LDO output is quickly driven to the nominal value.

The LDO start-up is shown in Figure 12.

VVLDO Final

90% of VVLDO Final

Constant current startup

Voltage regulating with

~200mA current limit

Figure 12 — LDO Start-Up

LDO Switch-Over Operation

The SC418 includes a switch-over function for the LDO.

The switch-over function is designed to increase efficiency

by using the more efficient DC-DC converter to power the

LDO output, avoiding the less efficient LDO regulator

when possible. The switch-over function connects the

VLDO pin directly to the VOUT pin through an internal

switch. When the switch-over is complete the LDO is

turned off, which reduces operating power loss. If the LDO

output is used to bias the SC418, then after switch-over

the device is self-powered from the switching regulator

with the LDO turned off.

After the switcher completes soft-start, the switch-over

logic waits for 32 switching cycles before it starts the

switch-over. There are two methods of completing the

switch-over of V

LDO to VOUT.

In the first method, the LDO is already in regulation when

the DC-DC converter is enabled. As soon as the PGOOD

output goes high, the 32 cycle count is started. The volt-

ages at the VLDO and VOUT pins are then compared; if the

two voltages are within ±300mV of each other, the VLDO

pin connects to the VOUT pin using an internal switch,

and the LDO is turned off.

In the second method, the DC-DC converter is already

running and the LDO is enabled. In this case the 32 cycle

count is started as soon as the LDO reaches 90% of its final

value. At this time, the VLDO and VOUT pins are compared,

and if within ±300mV the switch-over occurs and the LDO

is turned off.

Switch-over Limitations on VOUT and VLDO

Because the internal switch-over circuit always compares

the VOUT and VLDO pins at start-up, there are limitations

on permissible combinations of VOUT and VLDO. Consider

the case where VOUT is programmed to 1.5V and VLDO is

programmed to 1.8V. After start-up, the device would

connect VOUT to VLDO and disable the LDO, since the two

voltage are within the ±300mV switch-over window. To

avoid unwanted switch-over, the minimum difference

between VOUT and VLDO should be ±500mV.

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