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6.

Block diagram

Fig 1.

Block diagram

IO1

IO3

PROGRAMMABLE

IO1, IO2, IO3

IO2

CLK

RST_N

VDD

VSS

ROM

264 kB

PROGRAM

MEMORY

CPU

7680 B

DATA

MEMORY

EEPROM

80 kB

DATA AND

PROGRAM

MEMORY

CRC16

001aal646

FAST

RNG

TIMERS

16-bit

T0

16-bit

T1

RAM

ENHANCED PUBLIC

KEY

COPROCESSOR e.g.

RSA

AES

COPROCESSOR

TRIPLE-DES

COPROCESSOR

UART

ISO 7816

CLOCK

FILTER

SECURITY SENSORS

RESET GENERATION

VOLTAGE REGULATOR

MEMORY MANAGEMENT UNIT (MMU)

CLOCK

GENERATION