TUSB3210 datasheet(29/45 Pages) TI

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2.6.5

VIDSTA: VID/PID Status Register

2.7

Function Reset and Power-Up Reset Interconnect

TUSB3210

Universal Serial Bus

General-Purpose Device Controller

SLLS466F – FEBRUARY 2001 – REVISED AUGUST 2007

BIT

NAME

RESET

FUNCTION

RWE

Remote wake-up enable bit

RWE = 0

MCU clears this bit when host sends command to clear the feature.

RWE = 1

MCU writes 1 to this bit when host sends set device feature command to enable the remote

wake-up feature

FRSTE

Function reset connection bit. This bit connects/disconnects the USB function reset from the MCU reset.

FRSTE = 0

Function reset is not connected to the MCU reset.

FRSTE = 1

Function reset is connected to the MCU reset.

RWUP

Device remote wake-up request. This bit is set by the MCU and is cleared automatically.

RWUP = 0

Writing a 0 to this bit has no effect.

RWUP = 1

When the MCU writes a 1, a remote wake-up pulse is generated.

RSV

Reserved

CONT

Connect/disconnect bit

CONT = 0

Upstream port is disconnected. Pullup disabled

CONT = 1

Upstream port is connected. Pullup enabled

This register is used to read the value on four external pins. The firmware can use this value to select one

of the vendor identification/product identifications (VID/PID) stored in memory. The TUSB3210 supports up

to 16 unique VID/PIDs with application code to support different products. This provides a unique

opportunity for original equipment manufacturers (OEMs) to have one device to support up to 16 different

product lines by using S0–S3 to select VID/PID and behavioral application code for the selected product.

RSV

R/O

BIT

NAME

RESET

FUNCTION

3–0

S[3:0]

VID/PID selection bits. These bits reflect the status of the external pins as defined by Table 2-6. Note that

a pin tied low is reflected as a 0 and a pin tied high is reflected as a 1.

7–4

RSV

Reserved = 0

Table 2-6. External Pin Mapping to S[3:0] in VIDSTA Register

VIDSTA REGISTER, S[3:0]

COMMENTS

NO.

NAME

P3.0

Dual function P3.0 I/O or S0 input

P3.1

Dual function P3.1 I/O or S1 input

S2-pin is input

S3-pin is input

Figure 2-2 represents the logical connection of the USB-function-reset (USBR) and power-up-reset (RST)

pins. The internal RESET signal is generated from the RST pin (PURS signal) or from the USB-reset

(USBR signal). The USBR can be enabled or disabled by the FRSTE bit in the USBCTL register (on

power up FRSTE = 0). The internal RESET is used to reset all registers and logic, with the exception of

the USBCTL and MISCTL registers. The USBCTL and MCU configuration registers (MCNFG) are cleared

by the PURS signal only.

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