DESCRIPTION (CONTINUED)

TLK1102E

These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam

during storage or handling to prevent electrostatic damage to the MOS gates.

Alternatively, the TLK1102E can be configured using its configuration pins in two modes selectable using the

MODE pin. In Pin Control Mode 1 (see Figure 2b), a common setting can be set for the two channels for the

output de-emphasis level and the interconnect length using the DE pin and LN0, LN1 pins respectively. In Pin

Control Mode 2 (see Figure 2c), those parameters can be set individually for the two channels using DEA, DEB,

LNA, and LNB pins. In both modes only a common setting is available for the output voltage swing using the

The outputs can be disabled using the DISA and DISB pins. The DISA/DISB pins and the LOSA/LOSB pins can

be connected together to implement an external output squelch function. The TLK1102E implements an internal

output squelch function that can be enabled using the two-wire serial interface. In addition, a special fast

auto-squelch function can be selected through the two-wire serial interface when needed to support SAS and

SATA out-of-band (OOB) signals.

The POLA and POLB pins can be used to reverse the polarity of the OUTA+/OUTA- and OUTB+/OUTB– pins

respectively.

The high input signal dynamic range ensures low jitter output signals even when overdriven with input signal

control signals such as SAS and SATA OOB signals. The loss-of-signal detection and output disable functions

are carefully designed to meet SAS/SATA OOB signal timing constraints.

Table 1. Equalization Level Settings

TWO-WIRE SERIAL I/F MODE

PIN MODE 1

PIN MODE 2

CABLE LENGTH (meters)

(registers 3 and 6)

(1.8dB/m loss at 5 GHz)

LN1

LN0

LNA / LNB

EQ3

EQ2

EQ1

EQ0

0 – 2

GND

GND

GND

1

1

1

1

2 – 6

GND

VCC

GND

0

1

1

1

6 – 11

VCC

GND

1.8 M

Ω to GND

0

1

0

1

11 – 15

VCC

VCC

VCC

0

0

0

0

2

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