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L9952GXP датащи(PDF) 59 Page - STMicroelectronics

номер детали L9952GXP
подробное описание детали  Power management system IC
PDF  68 Pages
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производитель  STMICROELECTRONICS [STMicroelectronics]
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L9952GXP
SPI control and status registers
Doc ID 13518 Rev 5
59/68
8.1.3
Control register 2
While writing to the control register 2, the status register 0 can be read at the DO-Output of
the SPI.
Table 48.
Control register 2
Input filter configuration
Reset
level
LIN
Open load threshold
Bit
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
Access
W
W
W
W
W
W
W
W
W
W
W
W
W
W
W
W
W
W
W
W
W
Reset
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Name
RES
ICMP
LSO
VUV
LIN
Slope
IC
41
IC
40
IC
31
IC
30
IC
21
IC
20
IC
11
IC
10
LEV
1
LEV
0
TXDT
Out
LINP
U
O_HS
REC
VS
Lock
Out
OLT
HS4
OLT
HS3
OLT
HS2
OLT
HS1
Table 49.
Configuration bit OLT_HSx, VSLOCK Out, O_HS_REC, LINPU and
TXD_TOUT
Name/state
Definition/function
OLT_HSx
Open load threshold for the High Side Drivers Out1..4
0: Iopenload = 2mA; 1: Iopenload = 8mA
VSLOCK
Out
Automatic recovery after VS Over/Under voltage
“0” (default): Vs lockout is disabled, i.e. outputs will automatically recover (according
to output settings in CR0) after Vs over / under - voltage conditions has disappeared
“1”: Vs lockout is enabled, i.e. outputs will remain Off after Vs over / under voltage
recovery conditions has disappeared, until the Vs over / under voltage Status Bits
(SR1, bit s0,1) are cleared by CLR command (CR1, bit 21).
O_HS_REC
“1” = Recovery mode for OUT_HS Driver.
LINPU
“1” will disable the master pull up LINPU
TXD_TOUT
“1” will disable the dominant TxD time-out for the LIN Interface.
Table 50.
Configuration bit LEVx
Name/state
Definition/function
LEV1
LEV0
Controls the reset level
0
0
Set the reset threshold to 4.65V, typ.
0
1
Set the reset threshold to 4.35V, typ.
1
X
Reserved (do not use for operation, set LEV1 to “0”)



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