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NLSX3012 датащи(PDF) 9 Page - ON Semiconductor |
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NLSX3012 датащи(HTML) 9 Page - ON Semiconductor |
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9 / 12 page ![]() NLSX3012 http://onsemi.com 9 IMPORTANT APPLICATIONS INFORMATION Level Translator Architecture The NLSX3012 auto sense translator provides bi−directional voltage level shifting to transfer data in multiple supply voltage systems. This device has two supply voltages, VL and VCC, which set the logic levels on the input and output sides of the translator. When used to transfer data from the VL to the VCC ports, input signals referenced to the VL supply are translated to output signals with a logic level matched to VCC. In a similar manner, the VCC to VL translation shifts input signals with a logic level compatible to VCC to an output signal matched to VL. The NLSX3012 consists of four bi−directional channels that independently determine the direction of the data flow without requiring a directional pin. The one−shot circuits are used to detect the rising or falling input signals. In addition, the one shots decrease the rise and fall time of the output signal for high−to−low and low−to−high transitions. Input Driver Requirements Auto sense translators such as the NLSX3012 have a wide bandwidth, but a relatively small DC output current rating. The high bandwidth of the bi−directional I/O circuit is used to quickly transform from an input to an output driver and vice versa. The I/O ports have a modest DC current output specification so that the output driver can be over driven when data is sent to in the opposite direction. For proper operation, the input driver to the auto sense translator should be capable of driving 20 mA of peak output current with an output impedance less than 25 W. The bi−directional configuration of the translator results in both input stages being active for a very short time period. Although the peak current from the input signal circuit is relatively large, the average current is small and consistent with a standard CMOS input stage. Output Load Requirements The NLSX3012 is designed to drive CMOS inputs. Resistive pullup or pulldown loads of less than 50 k W should not be used with this device. The NLSX3373 or NLSX3378 open−drain auto sense translators are alternate translator options for an application such as the I2C bus that requires pullup resistors. Enable Input (EN) The NLSX3012 has an Enable pin (EN) that provides tri−state operation at the I/O pins. Driving the Enable pin to a low logic level minimizes the power consumption of the device and drives the I/O VCC and I/O VL pins to a high impedance state. Normal translation operation occurs when the EN pin is equal to a logic high signal. The EN pin is referenced to the VL supply and has Over−Voltage Tolerant (OVT) protection. Uni−Directional versus Bi−Directional Translation The NLSX3012 can function as a non−inverting uni−directional translator. One advantage of using the translator as a uni−directional device is that each I/O pin can be configured as either an input or output. The configurable input or output feature is especially useful in applications such as SPI that use multiple uni−directional I/O lines to send data to and from a device. The flexible I/O port of the auto sense translator simplifies the trace connections on the PCB. Power Supply Guidelines It is recommended that the VL supply should be less than or equal to the value of the VCC minus 0.4 V. The sequencing of the power supplies will not damage the device during the power up operation; however, the current consumption of the device will increase if VL exceeds VCC minus 0.4 V. In addition, the I/O VCC and I/O VL pins are in the high impedance state if either supply voltage is equal to 0 V. For optimal performance, 0.01 to 0.1 mF decoupling capacitors should be used on the VL and VCC power supply pins. Ceramic capacitors are a good design choice to filter and bypass any noise signals on the power supply voltage lines to the ground plane of the PCB. The noise immunity will be maximized by placing the capacitors as close as possible to the supply and ground pins, along with minimizing the PCB connection traces. |
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