TAS5713 datasheet(23/65 Pages) TI

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TAS5713

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SLOS637 – DECEMBER 2009

speaker load-impedance drops. If the high-current condition situation persists, i.e., the power stage is being

overloaded, a second protection system triggers a latching shutdown, resulting in the power stage being set in

the high-impedance (Hi-Z) state. The device returns to normal operation once the fault condition (i.e., a short

circuit on the output) is removed. Current-limiting and overcurrent protection are not independent for half-bridges.

That is, if the bridge-tied load between half-bridges A and B causes an overcurrent fault, half-bridges A, B, C,

and D are shut down.

Overtemperature Protection

The TAS5713 has an overtemperature-protection system. If the device junction temperature exceeds 150°C

(nominal), the device is put into thermal shutdown, resulting in all half-bridge outputs being set in the

high-impedance (Hi-Z) state and A_SEL_FAULT being asserted low. The TAS5713 recovers automatically once

the temperature drops approximately 30°C.

Undervoltage Protection (UVP) and Power-On Reset (POR)

The UVP and POR circuits of the TAS5713 fully protect the device in any power-up/down and brownout situation.

While powering up, the POR circuit resets the overload circuit (OLP) and ensures that all circuits are fully

operational when the PVDD and AVDD supply voltages reach 7.6 V and 2.7 V, respectively. Although PVDD and

AVDD are independently monitored, a supply-voltage drop below the UVP threshold on AVDD or either PVDD

pin results in all half-bridge outputs immediately being set in the high-impedance (Hi-Z) state and A_SEL_FAULT

being asserted low.

FAULT INDICATION

A_SEL_FAULT is an input pin during power up. This pin can be programmed after RESET to be an output by

writing 1 to bit 0 of I2C register 0x05. In that mode, the(A_SEL_FAULT pin has the definition shown in Table 1.

Any fault resulting in device shutdown is signaled by the A_SEL_FAULT pin going low (see Table 1). A latched

version of this pin is available on D1 of register 0x02. This bit can be reset only by an I2C write.

Table 1. A_SEL_FAULT Output States

A_SEL_FAULT

DESCRIPTION

Overcurrent (OC) or undervoltage (UVP) error or overtemperature error (OTE) or overvoltage

error

No faults (normal operation)

SSTIMER FUNCTIONALITY

The SSTIMER pin uses a capacitor connected between this pin and ground to control the output duty cycle when

exiting all-channel shutdown. The capacitor on the SSTIMER pin is slowly charged through an internal current

source, and the charge time determines the rate at which the output transitions from a near-zero duty cycle to the

desired duty cycle. This allows for a smooth transition that minimizes audible pops and clicks. When the part is

shut down, the drivers are placed in the high-impedance state and transition slowly down through a 3-k

Ω resistor,

similarly minimizing pops and clicks. The shutdown transition time is independent of the SSTIMER pin

capacitance. Larger capacitors increase the start-up time, while capacitors smaller than 2.2 nF decrease the

start-up time. The SSTIMER pin should be left floating for BD modulation.

CLOCK, AUTODETECTION, AND PLL

The TAS5713 is an I2S slave device. It accepts MCLK, SCLK, and LRCLK. The digital audio processor (DAP)

supports all the sample rates and MCLK rates that are defined in the clock control register .

The TAS5713 checks to verify that SCLK is a specific value of 32 fS, 48 fS, or 64 fS. The DAP only supports a 1 ×

fS LRCLK. The timing relationship of these clocks to SDIN is shown in subsequent sections. The clock section

uses MCLK or the internal oscillator clock (when MCLK is unstable, out of range, or absent) to produce the

internal clock (DCLK) running at 512 times the PWM switching frequency.

The DAP can autodetect and set the internal clock control logic to the appropriate settings for all supported clock

rates as defined in the clock-control register.

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