ATSAM3U datasheet(24/62 Pages) ATMEL

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6430CS–ATARM–09-Apr-10

SAM3U Series

Input/Output Lines

The SAM3U has different kinds of input/output (I/O) lines, such as general purpose I/Os (GPIO)

and system I/Os. GPIOs can have alternate functions thanks to multiplexing capabilities of the

PIO controllers. The same GPIO line can be used whether it is in IO mode or used by the multi-

plexed peripheral. System I/Os are pins such as test pin, oscillators, erase pin, analog inputs or

debug pins.

With a few exceptions, the I/Os have input schmitt triggers. Refer to the footnotes associated

with “PIO Controller - PIOA - PIOB - PIOC” on page 6 within Table 3-1, “Signal Description List”.

6.1

General Purpose I/O Lines (GPIO)

GPIO Lines are managed by PIO Controllers. All I/Os have several input or output modes such

as, pull-up, input schmitt triggers, multi-drive (open-drain), glitch filters, debouncing or input

change interrupt. Programming of these modes is performed independently for each I/O line

through the PIO controller user interface. For more details, refer to the “PIO Controller” section

of the product datasheet.

The input output buffers of the PIO lines are supplied through VDDIO power supply rail.

The SAM3U embeds high speed pads able to handle up to 65 MHz for HSMCI and SPI clock

lines and 35 MHz on other lines. See “AC Characteristics” of the product datasheet for more

details. Typical pull-up value is 100 k

Ω for all I/Os.

Each I/O line also embeds an ODT (On-Die Termination), (see Figure 6-1 below). ODT consists

of an internal series resistor termination scheme for impedance matching between the driver

output (SAM3) and the PCB track impedance preventing signal reflection. The series resistor

helps to reduce I/Os switching current (di/dt) thereby reducing in turn, EMI. It also decreases

overshoot and undershoot (ringing) due to inductance of interconnect between devices or

between boards. In conclusion, ODT helps reducing signal integrity issues.

Figure 6-1.

On-Die Termination schematic

6.2

System I/O Lines

System I/O lines are pins used by oscillators, test mode, reset, flash erase and JTAG to name

but a few.

6.3

Serial Wire JTAG Debug Port (SWJ-DP)

The SWJ-DP pins are TCK/SWCLK, TMS/SWDIO, TDO/SWO, TDI and commonly provided on

a standard 20-pin JTAG connector defined by ARM. For more details about voltage reference

and reset state, refer to Table 3-1, “Signal Description List”

PCB Trace

Z0 ~ 50 Ohms

Receiver

SAM3 Driver with

Rodt

Zout ~ 10 Ohms

Z0 ~ Zout + Rodt

ODT

36 Ohms Typ.

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